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Lambda Bipolar Transistor (LBT) in Static Random Access Memory CellSarkar, Manju 06 1900 (has links)
With a view to reduce the number of components in a Static Random Access Memory (SRAM) cell, the feasibility of use of Lambda Bipolar Transistor (LBT)in the bistable element of the cell has been explored under the present study. The LBT under consideration here comprises of an enhancement mode MOSFET integrated with a parasitic bipolar transistor so as to perform as a negative resistance device. LBTs for the study have been fabricated and analysed. The devices have been shown to function at much lower voltage and current levels than those reported earlier/ and thus have been shown to be suitable for lower power applications. The issues of agreements and discrepancies of the experimental results with the original DC model of the device have been highlighted and discussed. The factors contributing to the drain current of the MOSFET in the LBT have been identified. It has also been shown that in the real case of an LBT in operation, the MOSFET in it does not function as a discrete device for the same conditions of voltages and current levels as in an LBT. As per the present study, it is assessed to be influenced by the presence of the BJT in operation and this effect is felt more at the lower current levels of operation. With a separate and tailored p-well implantation the
possibility of fabrication of LBTs with a CMOS technology is established.
Along with a couple of polysilicon resistors, the LBTs have been successfully made to perform in the common-collector configuration as the bistable storage element of SRAM cell (as proposed in the literature). The bistable element with the LBT in common-emitter mode also has been visualised and practically achieved with the fabricated devices. The WRITE transients for either case have been simulated for various levels of WRITE voltages and their time of hold.The speed of Writing achieved are found comparable with that of the standard SRAMs. The advantages and disadvantages of using the LBT in either mode have been highlighted and discussed. The power consumption of the bistable element with the LBT in either mode is however shown to be the same.
A different approach of READING has been proposed to overcome the factors known to increase the cycle time. On the whole, under the present study, the proposal of using LBTs in the bistable storage element of the SRAM cell has been shown to be feasible. Such SRAM circuits can find possible applications in the fields where smaller circuit area is the major concern.
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Investigation of electrical and optical characterisation of HBTs for optical detectionZhang, Yongjian January 2016 (has links)
In this thesis, a detailed study of the electrical and optical characterisations of Heterojuction Bipolar Transistors (HBTs) for optical detection is presented. By comparing both DC and optical characterisations between In0.49Ga0.51P/GaAs Single Heterojuction Bipolar Transistors (SHBTs) and Double Heterojuction Bipolar Transistors (DHBTs), the advantages of using the DHBT as a short wavelength detector are shown. Phenomena related to the base region energy band bending in the DHBT caused by a self-induced effective electric field is discussed and its effects on the performance of the device are elaborated. The use of an eye diagram has been employed to provide requisite information for performance qualification of SHBT/DHBT devices. These give a more detailed understanding compared to conventional S-parameters method. A detailed comparison of In0.49Ga0.51P/GaAs SHBT and DHBT performance using an eye diagram as a functional tool by adopting a modified T-shaped small signal equivalent circuit are given. By adopting this modified T-shaped small signal equivalent circuit, the use of In0.49Ga0.51P/GaAs Double Heterojuction Phototransistors (DHPT) as a short wavelength photodetector is analysed. It is therefore shown that an eye diagram can act as a powerful tool in HBTs/HPTs design optimisations, for the first time in this work. In order to predict the spectral response (SR) and optical characterisations of GaAs-based HPTs, a detailed theoretical absorption model is also presented. The layer dependence of an optical flux absorption profile, along with doping dependent absorption coefficients are taken into account for the optical characterisation prediction. With the aim of eliminating the limitation of current gain as a prerequisite, analytical modelling of SR has been developed by resolving the continuity equation and applying realistic boundary conditions. Then, related physical parameters and a layer structure profile are used to implement simulations. A good agreement with the measured results of the Al0.3Ga0.7As/GaAs HPT is shown validating the proposed theoretical model.
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Improving linearity utilising adaptive predistortion for power amplifiers at mm-wave frequenciesValliarampath, J.T. (Joe) January 2014 (has links)
The large unlicensed 3 GHz overlapping bandwidth that is available worldwide at 60 GHz has resulted in renewed interest in 60 GHz technology. This frequency band has made it attractive for short-range gigabit wireless communication. The power amplifier (PA) directly influences the performance and quality of this entire communication chain, as it is one of the final subsystems in the transmitter. Spectral efficient modulation schemes used at 60 GHz pose challenging requirements for the linearity of the PA. To improve the linearity, several external linearisation techniques currently exist, such as feedback, feedforward, envelope elimination and restoration, linear amplification with non-linear components and predistortion.
This thesis is aimed at investigating and characterising the distortion components found in PAs at mm-wave frequencies and evaluating whether an adaptive predistortion (APD) linearisation technique is suitable to reduce these distortion components. After a thorough literature study and mathematical analysis, it was found that the third-order intermodulation distortion (IMD3) components were the most severe distortion components. Predistortion was identified as the most effective linearisation technique in terms of minimising these IMD3 components and was therefore proposed in this research. It does not introduce additional complexity and can easily be integrated with the PA. Furthermore, the approach is stable and has lower power consumption when compared to the aforementioned linearisation techniques. The proposed predistortion technique was developed compositely through this research by making it a function of the PA’s output power that was measured using a power detector. A comparator was used with the detected output power and the reference voltages to control the dynamic bias circuit of the variable gain amplifier. This provided control and flexibility on when to apply the predistortion to the PA and therefore allowing the linearity of the PA to be optimised. Three-stage non-linear and linear PAs were also designed at 60 GHz and implemented to compare the performance of the APD technique and form part of the hypothesis verification process.
The 130 nm silicon-germanium (SiGe) bipolar and complementary metal oxide semiconductor (BiCMOS) technology from IBM was used for the simulation of the entire APD and PA design and for the fabrication of the prototype integrated circuits (ICs). This technology has the advantage of integrating the high performance, low power intensive SiGe heterojunction bipolar transistors (HBTs) with the CMOS technology. The SiGe HBTs have a high cut-off frequency ( > 200 GHz), which is ideal for mm-wave PA applications and the CMOS components were integrated in the control logic of the digital circuitry. The simulations and IC layout were accomplished with Cadence Virtuoso. The implemented IC occupies an area of 1.8 mm by 2.0 mm.
The non-linear PA achieves a of 11.97 dBm and an of -10 dBm. With the APD technique applied, the linearity of the PA is significantly improved with an of -6 dBm and an optimum IMD3 reduction of 10 dB. Based on the findings and results of the applied APD technique, APD reduced intermodulation distortion (especially the IMD3) and is thus suitable to improve the linearity of PAs at mm-wave frequencies. To the knowledge of this author, no APD technique has been applied for PAs at 60 GHz, therefore the contribution of this research will assist future PA designers to characterise and optimise the reduction of the IMD3 components. This will result in improved linear output power from the PA and the use of complex modulation schemes at 60 GHz. ## Die groot ongelisensieerde oorvleuelde bandwydte van 3 GHz wat wêreldwyd by 60 GHz beskikbaar is, het hernude belangstelling in 60 GHz-tegnologie tot gevolg gehad. Hierdie frekwensieband het dit aantreklik gemaak vir kortafstand-gigabis draadlose kommunikasie. Aangesien die drywingsversterker een van die finale subsisteme in die seintoestel is, het dit ’n direkte invloed op die werkverrigting en kwaliteit van die hele kommunikasieketting. Spektraaldoeltreffende modulasieskemas wat by 60 GHz gebruik word, stel uitdagende vereistes vir die lineariteit van die drywingsversterker. Om die lineariteit te verbeter, is daar tans verskeie eksterne linearisasietegnieke beskikbaar, soos terugvoer, vooruitvoer, omhullende eliminasie en -restorasie, lineêre versterking met nie-lineêre komponente en predistorsie.
Hierdie tesis het ten doel om die distorsiekomponente wat by millimetergolffrekwensies in drywingsversterkers gevind word, te ondersoek en te karakteriseer en om te bepaal of ’n aanpassende predistorsielinearisasietegniek geskik is om hierdie distorsiekomponente te verminder. Na ’n deeglike literatuurstudie en wiskundige analise is gevind dat die derde-orde-intermodulasiedistorsiekomponente (IMD3) die ergste distorsiekomponente was. Predistorsie is geïdentifiseer as die mees effektiewe linearisasietegniek om hierdie IMD3-komponente te minimeer en die gebruik daarvan is gevolglik in hierdie navorsing voorgestel. Dit bring nie addisionele kompleksiteit mee nie en kan maklik met die drywingsversterker geïntegreer word. Daarbenewens is die benadering stabiel, met laer kragverbruik in vergelyking met die linearisasietegnieke wat voorheen genoem is. Die voorgestelde predistorsietegniek is in hierdie navorsing ontwikkel deur dit ’n funksie van die drywingsversterker se uitsetkrag te maak, wat gemeet is deur ’n kragdetektor te gebruik. ’n Vergelyker is saam met die gemete uitsetkrag en die verwysingspannings gebruik om die dinamiese voorspanningsbaan van die veranderlike winsversterker te beheer. Dit het toegelaat vir beheer en buigsaamheid in die aanwending van die predistorsie op die drywingsversterker en gevolglik vir die optimering van die lineêriteit van die drywingsversterker. Driefase- nie-lineêre en lineêre drywingsversterkers is ook by 60 GHz ontwerp en geïmplementeer om die werkverrigting van die aanpassende predistorsietegniek te vergelyk en dit vorm deel van die verifikasieproses van die hipotese.
Die 130 nm-silikon-germanium (SiGe) bipolêre en metaaloksiedhalfgeleier- (BiCMOS) tegnologie van IBM is gebruik vir die simulasie van die hele aanpassende predistorsietegniek- en drywingsversterkerontwerp en vir die vervaardiging van die prototipe- geïntegreerde stroombane. Hierdie tegnologie het die voordeel dat dit die hoë werkverrigting en lae krag-intensiewe SiGe-heterovoegvlak-bipolêre transistors (HBTs) met die CMOS-tegnologie integreer. Die SiGe-HBTs het ’n hoë afsnyfrekwensie ( > 200 GHz), wat ideaal is vir mm-golfdrywingsversterkeraanwendings en die CMOS-komponente is in die beheer-logika van die digitale stroombaan geïntegreer. Die geïntegreerde stroombaan beslaan ’n area van 1.8 mm by 2.0 mm.
Die nie-lineêre drywingsversterker behaal ’n van 11.97 dBm en ’n van -10 dBm. As die APD-tegniek toegepas word, word die lineariteit van die drywingsversterker beduidend verbeter tot ’n van -6 dBm en ’n optimum-IMD3-vermindering van 10 dB. Volgens die bevindings en resultate van die APD-tegniek wat toegepas is, verminder APD intermodulasiedistorsie (veral die IMD3) en is gevolglik geskik om die lineariteit van drywingsversterkers by mm-golffrekwensies te verbeter. Na die wete van hierdie skrywer is daar nie voorheen enige APD tegniek toegepas vir drywingsversterkers by 60 GHz nie, gevolglik sal die bydrae van hierdie navorsing toekomstige drywingsversterkerontwerpers help om die vermindering van die IMD3-komponente te karakteriseer en optimeer. Dit sal verbeterde lineêre uitsetkrag van die drywingsversterker tot gevolg hê, asook meer komplekse modulasieskemas by 60 GHz toelaat. / Thesis (PhD)--University of Pretoria, 2014. / lk2014 / Electrical, Electronic and Computer Engineering / PhD / unrestricted
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Transistor bipolaire basse fréquence pour application spatiale et de défense soumis à une double agression onde électromagnétique : - dose Ionisante / Bipolar Transistor for Low Frequency Space Application and Defense subject to a double aggression Electromagnetic wave - Total Ionizing DoseDoridant, Adrien 10 January 2013 (has links)
Aujourd'hui les circuits intégrés commerciaux sont de plus en plus utilisés dans les satellites de télécommunication ou d'observation. En effet les contraintes économiques imposent l'usage de circuits non durcis aux radiations. Ceci, associé au fait que la technologie évolue entrainant une baisse de consommation et donc une diminution des marges de susceptibilité électromagnétique, les rendent plus sensibles à la fois aux interférences électromagnétiques et à la dose ionisante. Cet ensemble met en péril la mission des satellites. Ce travail de thèse est donc précurseur dans le domaine de la fiabilité combinée vis à vis de la dose ionisante et des signaux hautes fréquences (HF) sur des transistors bipolaires destinés aux applications basse fréquence. Nous avons tout d'abord observé la modification du comportement d'un transistor bipolaire discret lorsqu'il est soumis à une agression sinusoïdale continue (CW) dans la gamme 100 MHz - 5 GHz. Cette forme de signal nous a permis d'observer la réponse du transistor dans un régime établi. Il est important de noter que cette modification du comportement a lieu même pour des fréquences du signal d'interférence assez éloignées de la gamme de fréquence de fonctionnement du transistor. Nous avons pu alors mettre en évidence les différents mécanismes physiques mis en jeu. Ensuite nous avons étudié l'influence de différents paramètres : fréquence et puissance du signal d'interférence, boîtier du transistor, valeurs des éléments du circuit de polarisation, sur la réponse du transistor soumis à l'agression CW. Un critère simple permettant de prévoir le comportement du transistor sous agression CW est proposé. Nous avons ensuite étudié l'influence de la dose ionisante sur le comportement du transistor sous agression CW. Après avoir observé la modification du comportement statique du transistor suite à l'irradiation avec une source de cobalt 60, nous avons analysé l'évolution des grandeurs électriques du transistor sous agression HF, pour différentes valeurs de doses totales déposées. Nous avons donc pu monter que la dose ionisante influence effectivement le comportement du transistor sous agression. Enfin, nous avons soumis le transistor à une autre forme d'agression haute fréquence : un signal sinusoïdal modulé par un signal impulsionnel. Grâce à ce type de signal, nous avons pu faire une analyse du comportement transitoire du transistor, et mettre en évidence l'importance des capacités, à la fois internes et externes au composant. Ici encore la dose ionisante influence les comportements. / Nowadays, economic constraints push space and aeronautical industries to use Commercial Off The Shelf (COTS) components, even though natural space environment constitutes a real challenge for electronic reliability due to ionizing particles. In addition to this problem, technological advancements lead to a decrease in device consumption inducing smaller electromagnetic susceptibility margins. Hence, integrated circuits are more sensitive to both Electromagnetic Interferences (EMI) and ionizing dose, which may threaten satellite missions. This thesis reveals precursor work in the field of combined ionizing dose and high frequency (HF) interferences on bipolar transistors designed for low frequency applications. Classical discrete low frequency bipolar transistors biased at integrated-circuit level of currents are put under study. A change of the voltage output when the device is subject to a continuous sine aggression (CW) in the range 100 MHz - 5 GHz is observed. This CW waveform allows an analysis of the response of the transistor in a steady state. It is important to note that the change in behavior of the transistor occurs even for interference frequency bands way higher than the operating frequencies of the device. We identified the different physical mechanisms involved during high frequency interference injection: rectification and current crowding. Then we studied the influence on the behavior under interference of different parameters: frequency and power of the interference signal, low frequency and RF frequency package of the transistor, values of elements of the bias circuit. A simple criterion to predict the way of change in the output voltage of the transistor is proposed. The same experiments were conducted on the transistors irradiated with a cobalt 60 source. We highlighted the importance for high-frequency susceptibility of the change induced by ionizing dose near the emitter base junction. Hence the susceptibility must be considered for different bias operations for different ionizing dose rates. Finally, our interest focused on another type of HF interference: a sine wave modulated by a pulse signal. With this type of signal, the transient behavior of the transistor under interference is analyzed. It highlights the importance of internal and external capacitances of the device on its response. Here again ionizing dose influences the electromagnetic susceptibility of the transistor.
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Improving linearity utilising adaptive predistortion for power amplifiers at mm-wave frequenciesValliarampath, J.T. (Joe) 29 July 2014 (has links)
The large unlicensed 3 GHz overlapping bandwidth that is available worldwide at 60 GHz has resulted in renewed interest in 60 GHz technology. This frequency band has made it attractive for short-range gigabit wireless communication. The power amplifier (PA) directly influences the performance and quality of this entire communication chain, as it is one of the final subsystems in the transmitter. Spectral efficient modulation schemes used at 60 GHz pose challenging requirements for the linearity of the PA. To improve the linearity, several external linearisation techniques currently exist, such as feedback, feedforward, envelope elimination and restoration, linear amplification with non-linear components and predistortion.
This thesis is aimed at investigating and characterising the distortion components found in PAs at mm-wave frequencies and evaluating whether an adaptive predistortion (APD) linearisation technique is suitable to reduce these distortion components. After a thorough literature study and mathematical analysis, it was found that the third-order intermodulation distortion (IMD3) components were the most severe distortion components. Predistortion was identified as the most effective linearisation technique in terms of minimising these IMD3 components and was therefore proposed in this research. It does not introduce additional complexity and can easily be integrated with the PA.
Furthermore, the approach is stable and has lower power consumption when compared to the aforementioned linearisation techniques. The proposed predistortion technique was developed compositely through this research by making it a function of the PA’s output power that was measured using a power detector. A comparator was used with the detected output power and the reference voltages to control the dynamic bias circuit of the variable gain amplifier. This provided control and flexibility on when to apply the predistortion to the PA and therefore allowing the linearity of the PA to be optimised. Three-stage non-linear and linear PAs were also designed at 60 GHz and implemented to compare the performance of the APD technique and form part of the hypothesis verification process.
The 130 nm silicon-germanium (SiGe) bipolar and complementary metal oxide semiconductor (BiCMOS) technology from IBM was used for the simulation of the entire APD and PA design and for the fabrication of the prototype integrated circuits (ICs). This technology has the advantage of integrating the high performance, low power intensive SiGe heterojunction bipolar transistors (HBTs) with the CMOS technology. The SiGe HBTs have a high cut-off frequency (fT > 200 GHz), which is ideal for mm-wave PA applications and the CMOS components were integrated in the control logic of the digital circuitry. The simulations and IC layout were accomplished with Cadence Virtuoso. The implemented IC occupies an area of 1.8 mm by 2.0 mm.
The non-linear PA achieves a Psat of 11.97 dBm and an IP1dB of -10 dBm. With the APD technique applied, the linearity of the PA is significantly improved with an IP1dB of -6 dBm and an optimum IMD3 reduction of 10 dB. Based on the findings and results of the applied APD technique, APD reduced intermodulation distortion (especially the IMD3) and is thus suitable to improve the linearity of PAs at mm-wave frequencies. To the knowledge of this author, no APD technique has been applied for PAs at 60 GHz, therefore the contribution of this research will assist future PA designers to characterise and optimise the reduction of the IMD3 components. This will result in improved linear output power from the PA and the use of complex modulation schemes at 60 GHz. / Thesis (PhD)--University of Pretoria, 2014. / Electrical, Electronic and Computer Engineering / PhD
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III-Nitride Transistors for High Linearity RF ApplicationsSohel, Md Shahadat Hasan January 2020 (has links)
No description available.
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Examination of Power Systems Solutions Considering High Voltage Direct Current TransmissionRidenour, Daniel Keith 05 October 2015 (has links)
Since the end of the Current Wars in the 19th Century, alternating current (AC) has dominated the production, transmission, and use of electrical energy. The chief reason for this dominance was (and continues to be) that AC offers a way minimize transmission losses yet transmit large power from generation to load. With the Digital Revolution and the entrance of most of the post-industrialized world into the Information Age, energy usage levels have increased due to the proliferation of electrical and electronic devices in nearly all sectors of life. A stable electrical grid has become synonymous with a stable nation-state and a healthy populace.
Large-scale blackouts around the world in the 20th and the early 21st Centuries highlighted the heavy reliance on power systems and because of that, governments and utilities have strived to improve reliability. Simultaneously occurring with the rise in energy usage is the mandate to cut the pollution by generation facilities and to mitigate the impact grid expansion has on environment as a whole. The traditional methods of transmission expansion are beginning to show their limits as utilities move generation facilities farther from load centers, which reduces geographic diversity, and the integration of nondispatchable, renewable energy sources upsets the current operating regime. A challenge faces engineers - how to expand generation, expand transmission capacity, and integrate renewable energy sources while maintaining maximum system efficiency and reliability.
A technology that may prove beneficial to the operation of power system is high voltage direct current transmission. The technology brings its own set of advantages and disadvantages, which are in many ways the complement of AC. It is important to update transmission planning processes to account for the new possibilities that HVDC offers. This thesis submits a discussion of high voltage direct current transmission technology itself and an examination of how HVDC can be considered in the planning process. / Master of Science
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Investigation and development of advanced Si/SiGe and Si/SiGeC Heterojunction Bipolar Transistors by means of Technology Modeling / Recherche et développement de transistors bipolaires avancés par le biais de la modélisation technologiqueQuiroga, Andrés 14 November 2013 (has links)
Le travail porte sur le développement et l’optimisation de transistors bipolaires à hétérojonction (TBH) SiGe et SiGeC par conception technologique assistée par ordinateur (TCAD). L'objectif est d'aboutir à un dispositif performant réalisable technologiquement, en tenant compte de tous les paramètres : étapes de fabrication technologiques, topologie du transistor, modèles physiques. Les études menées permettent d’atteindre les meilleures performances, en particulier une amélioration importante de la fréquence maximale d’oscillation (fMAX). Ce travail est la première approche développée pour la simulation des TBH SiGeC qui prend en compte l'impact de la contrainte et de la teneur en germanium et en carbone dans la base; conjointement pour les simulations des procédés de fabrication et les simulations électriques.Pour ce travail, nous avons développé et implémenté dans le simulateur TCAD des méthodes d'extraction de fMAX prenant en compte les éléments parasites intrinsèques et extrinsèques. Nous avons développé et implémenté un modèle pour la densité effective d’états fonction de la teneur en germanium et en carbone dans la base. Les modèles pour la bande interdite, la mobilité et le temps de relaxation de l'énergie sont calibrés sur la base de simulations Monte-Carlo.Les différentes analyses présentées dans cette thèse portent sur six variantes technologiques de TBH. Trois nouvelles architectures de TBH SiGeC avancés ont été élaborées et proposées pour des besoins basse et haute performance. Grace aux résultats obtenus, le meilleur compromis entre les différents paramètres technologiques et dimensionnels permettent de fabriquer un TBH SiGeC avec une valeur de fMAX de 500 GHz, réalisant ainsi l’objectif principal de la thèse. / The present work investigates the technology development of state-of-the-art SiGe and SiGeC Heterojunction Bipolar Transistors (HBT) by means of technology computer aided design (TCAD). The objective of this work is to obtain an advanced HBT very close to the real device not only in its process fabrication steps, but also in its physical behavior, geometric architecture, and electrical results. This investigation may lead to achieve the best electrical performances for the devices studied, in particular a maximum operating frequency of 500 GHz. The results of this work should help to obtain more physical and realistic simulations, a better understanding of charge transport, and to facilitate the development and optimization of SiGe and SiGeC HBT devices.The TCAD simulation kits for SiGe/SiGeC HBTs developed during our work have been carried out in the framework of the STMicroelectronics bipolar technology evolution. In order to achieve accurate simulations we have used, developed, calibrated and implemented adequate process models, physical models and extraction methodologies. To our knowledge, this work is the first approach developed for SiGe/SiGeC HBTs which takes into account the impact of the strain, and of the germanium and carbon content in the base, for both: process and electrical simulations.In this work we will work with the successive evolutions of B3T, B4T and B5T technologies. For each new device fMAX improves of 100 GHz, thus the technology B3T matches to 300 GHz, B4T and B5T to 400 and 500 GHz, respectively.Chapter one introduces the SiGe SiGeC heterojunction bipolar technologies and their operating principles. This chapter deals also with the high frequency AC transistor operation, the extraction methods for fMAX and the carrier transport in extremely scaled HBTs.Chapter two analyzes the physical models adapted to SiGeC strained alloys used in this work and the electrical simulation of HBT devices. This is also an important work of synthesis leading to the selection, implementation and development of dedicated models for SiGeC HBT simulation.Chapter three describes the B3T TCAD simulation platform developed to obtain an advanced HBT very close to the real device. In this chapter the process fabrication of the B3T technology is described together with the methodology developed to simulate advanced HBT SiGeC devices by means of realistic TCAD simulations.Chapter four describes the HBT architectures developed during this work. We will propose low-cost structures with less demanding performance requirements and highly performing structures but with a higher cost of production. The B4T architecture which has been manufactured in clean-room is deeply studied in this chapter. The impact of the main fabrication steps is analyzed in order to find the keys process parameters to increase fMAX without degrading other important electrical characteristics. At the end of this chapter the results obtained is used to elaborate a TCAD simulation platform taking into account the best trade-off of the different key process parameters to obtain a SiGeC HBT working at 500 GHz of fMAX.
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Low-Frequency Noise in Si-Based High-Speed Bipolar TransistorsSandén, Martin January 2001 (has links)
No description available.
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Chemical Vapor Depositionof Si and SiGe Films for High-Speed Bipolar TransistorsPejnefors, Johan January 2001 (has links)
This thesis deals with the main aspects in chemical vapordeposition (CVD) of silicon (Si) and silicon-germanium (Si1-xGex) films for high-speed bipolar transistors.In situdoping of polycrystalline silicon (poly-Si)using phosphine (PH3) and disilane (Si2H6) in a low-pressure CVD reactor was investigated toestablish a poly-Si emitter fabrication process. The growthkinetics and P incorporation was studied for amorphous Si filmgrowth. Hydrogen (H) incorporated in the as-deposited films wasrelated to growth kinetics and the energy for H2desorption was extracted. Film properties such asresistivity, mobility, carrier concentration and grain growthwere studied after crystallization using either furnaceannealing or rapid thermal annealing (RTA). In order tointegrate an epitaxial base, non-selective epitaxial growth(NSEG) of Si and SiGe in a lamp-heated single-waferreduced-pressure CVD reactor was examined. The growth kineticsfor Si epitaxy and poly-Si deposition showed a differentdependence on the deposition conditions i.e. temperature andpressure. The growth rate difference was mainly due to growthkinetics rather than wafer surface emissivity effects. However,it was observed that the growth rate for Si epitaxy and poly-Sideposition was varying during growth and the time-dependencewas attributed to wafer surface emissivity variations. A modelto describe the emissivity effects was established, taking intoconsideration kinetics and the reactor heating mechanisms suchas heat absorption, emission andconduction. Growth ratevariations in opening of different sizes (local loading) andfor different oxide surface coverage (global loading) wereinvestigated. No local loading effects were observed, whileglobal loading effects were attributed to chemical as well astemperature effects. Finally, misfit dislocations formed in theSiGe epitaxy during NSEG were found to originate from theinterface between the epitaxial and polycrystalline regions.The dislocations tended to propagate across the activearea. <b>Keywords:</b>chemical vapor deposition (CVD), bipolarjunction transistor (BJT), heterojunction bipolar transistor(HBT), silicon-germanium (SiGe), epitaxy, poly-Si emitter,in situdoping, non-selective epitaxy (NSEG), loadingeffect, emissivity effect
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