Le domaine des télécommunications ferroviaires est en perpétuelle évolution, ses axes d’investigation sont principalement motivés par un besoin toujours grandissant en termes de débit de données, qualité de transmission et fiabilité de localisation, mais restent freinés par un environnement fréquentiel de plus en plus encombré. Dans ce contexte, la conception d’un système qui assure à la fois, les besoins de localisation, d’identification des obstacles, et de communication, semble primordiale. Aussi, la technologie ultra large bande s’avère très prometteuse comme technologie de base pour ce système. Dans ce travail de thèse, un système radar coopératif pour la localisation, la détection d’obstacles, l’identification d’obstacles et la communication basé sur la technologie ULB, est proposé. Dans ce cadre, différentes techniques de multiplexage basées sur le principe de plusieurs techniques de modulation et d’accès multiple telles que la PPM, l’OAM, la 2πM, et la DS-CDMA ont été développées. Ces techniques ont pour buts, de séparer les signaux de communication et les signaux de localisation, ainsi que d’augmenter le débit des transmissions de données en augmentant le nombre des paramètres véhiculant l’information à envoyer. Des études théoriques alliées à des simulations ont été réalisées, afin de les comparer en termes de taux d’erreur binaire et de débit. Les résultats théoriques et de simulations du système proposé ont été validés par des expérimentations menées dans un environnement réel. / Telecommunication in railway land is in perpetual evolution, its investigation axes are mainly motivated by a growing need in term of data rates, quality of transmission, accuracy and reliability of the localization, but it remains slowed by a frequentiel environment, which is increasingly crowded. In this context, the design of a system that ensure in same time, localization, obstacles recognition and communication, seems a very critical. In this thesis, to design such a sensor, we propose the use of so-called spectral diversity techniques also found under the name of Ultra Wideband radio (UWB). To separate localization signal and communication signal and to increase communication data rate, several multiplexing techniques based on the principle of multiple modulation techniques and multiple access such as PPM, the OAM, the 2πM, and DS-CDMA have been developed. Theoretical studies combined with simulations were performed to evaluate and compare these techniques in term of binary error rate and data rate communication. Theoretical results and simulations of the proposed system have been validated by experiments conducted in a real environment.

<p>To take advantage of the high speed in an optic fiber, one of the basic concept in fiber optic communication is to allow several users to simultaneously transmit data over the channel. One technique that provides multiple access is it fiber optic-code division multiple access (FO-CDMA). In FO-CDMA each user is assigned one or more signature sequences called codewords, which are subsets of a type of optical orthogonal code (OOC). The channel input/output consists of the superposition of several users codewords and at the receiver end an optical correlator extracts the information. </p><p>In the parallel code constructions, presented in this report, each user j is assigned a subset Cj from a code C. The subsets are disjoint and their union is the whole set C. A new way to map the information bits is to insert up to L zeros before each codeword from Cj and let this represent information aswell. This gives high rates for active users but an investigation is needed to ensure that this does not compromise the systems wanted property of sending information with a small probability of errors for all users. Therefore a simulation environment has been implemented in Matlab. </p><p>The result from these simulations shows that BER for the L parallel codes is acceptable and not much higher than for the traditional constructions. Because of the higher rate these construction should be preferred but an analysis if a hardware implementation is possible.</p>

<p>Today wireless transmission of data is becoming more and more popular and the need for faster transmission rates is increasing. Since the bandwidth is limited it is important to try to use it to the fullest. CDMA is a technology that allows multiple accesses on the same frequency and time thus making it very bandwidth efficient. The CDMA technology was first introduced in the second generation’s cellular systems but has since then been improved and is reused in today’s 3G systems as Wideband CDMA. ISY is interested in getting a behavioural model of a W-CDMA system since they had developed a DSP processor called BBP1 and were thinking about adding W-CDMA support for it. Even though our system is not implemented on the BBP1 it should provide a good base for future implementations. This thesis project will describe the construction of a behavioural model of a W-CDMA system following the standard specified by 3GPP. The system simulates W-CDMA transmission and reception and has an optional channel used to simulate real world interference. The receiver uses a rake combiner to improve the performance of the system.</p>

Made available in DSpace on 2014-12-17T14:56:02Z (GMT). No. of bitstreams: 1 CiroAPT.pdf: 868504 bytes, checksum: d74079034ebc48de53a5dc4be812ec74 (MD5) Previous issue date: 2003-10-17 / This master dissertation introduces a study about some aspects that determine the aplication of adaptative arrays in DS-CDMA cellular systems. Some basics concepts and your evolution in the time about celular systems was detailed here, meanly the CDMA tecnique, specialy about spread-codes and funtionaly principies. Since this, the mobile radio enviroment, with your own caracteristcs, and the basics concepts about adaptive arrays, as powerfull spacial filter was aborded. Some adaptative algorithms was introduced too, these are integrants of the signals processing, and are answerable for weights update that influency directly in the radiation pattern of array. This study is based in a numerical analysis of adaptative array system behaviors related to the used antenna and array geometry types. All the simulations was done by Mathematica 4.0 software. The results for weights convergency, square mean error, gain, array pattern and supression capacity based the analisis made here, using RLS (supervisioned) and LSDRMTA (blind) algorithms. / Esta disserta??o de mestrado vem trazer um estudo sobre alguns aspectos que influenciam na aplica??o de antenas adaptativas em sistemas celulares DS-CDMA (ou simplesmente CDMA). Foram detalhados alguns conceitos b?sicos a respeito do sistema celular e em geral, bem como sua evolu??o ao longo do tempo, dando ?nfase ? t?cnica CDMA, no que diz respeito aos c?digos de espalhamento e princ?pio de funcionamento. A partir disso, o ambiente de r?dio m?vel, com suas caracter?sticas peculiares, foi abordado, bem como os conceitos b?sicos em que se baseiam o sistema de antenas adaptativas com sua poderosa capacidade de filtragem espacial, capaz de reduzir significativamente o efeito de sinais indesejados. Tamb?m alguns algoritmos adaptativos foram discutidos, esses s?o integrantes do processamento dos sinais captados pelos arranjos, e s?o respons?veis pela atualiza??o dos pesos que de certa forma controlar?o o diagrama de radia??o do arranjo. Mais especificamente, esse trabalho fundamentou-se na an?lise, mediante simula??es computacionais, do comportamento do sistema de antenas adaptativas face ao tipo de antena e ao tipo (geometria) de arranjo empregados. Todas as simula??es foram feitas utilizando o software Mathematica 4.0. Os resultados para a converg?ncia dos pesos, erro m?dio quadr?tico, ganho, diagrama de radia??o e capacidade de supress?o foram as grandezas que basearam as an?lises aqui feitas, utilizando para isso, os algoritmos RLS (supervisionado) e LSDRMTA (cego).

A dinâmica de sistemas caóticos é uma área de pesquisa relativamente recente, diretamente relacionada com os campos da engenharia, física e matemática aplicada. A sincronização entre sistemas dinâmicos tem sido um tópico de pesquisa muito freqüente, abrangendo campos desde a mecânica de corpos celestiais até a física dos lasers. Entretanto, a maioria dos trabalhos da área concentra-se em simulações numéricas do comportamento de sistemas caóticos. Com o objetivo de verificar aplicações em engenharia do sincronismo entre circuitos, foi proposto o circuito eletrônico partícula em caixa, que é relativamente simples, se comparado com outros trabalhos na literatura. A originalidade deste trabalho consiste em verificar a robustez de alguns sistemas compostos de circuitos idênticos que simulam o comportamento de uma partícula em caixa em configurações mestre-escravo, em diversas topologias, explorando o sincronismo dos mesmos utilizando uma malha fechada de realimentação de erro. A robustez do acoplamento destes sistemas é estudada por meio de montagens experimentais e simulações numéricas. A observação da sua dinâmica permite sugerir aplicações na área de telecomunicações em multiplexação de sinais, acesso multiusuário e tecnologia CDMA (Code Division Multiple Access) / The dynamics of chaotic systems is a relatively new research area, directly related to the fields of engineering, physics and applied mathematics. Synchronization between dynamic systems has been a very frequent topic of research, covering fields ranging from mechanics of celestial bodies to the physics of lasers. However, most of the work area focuses on numerical simulations of the behavior of chaotic systems. In order to verify engineering applications of synchronism of circuits, it was proposed a particle in a box electronic circuit, which is relatively simple if compared to other studies. The originality of this work is to verify the robustness of some systems composed of identical circuits that simulate the behavior of a particle in a box in master-slave configurations in several topologies, exploring their synchronism using a closed loop feedback error. The strength of the coupling of these systems is studied through numerical simulations and experimental setups. The observation of this dynamics allows us to suggest applications in telecommunications in signal multiplexing, multiuser access and CDMA (Code Division Multiple Access)

To take advantage of the high speed in an optic fiber, one of the basic concept in fiber optic communication is to allow several users to simultaneously transmit data over the channel. One technique that provides multiple access is it fiber optic-code division multiple access (FO-CDMA). In FO-CDMA each user is assigned one or more signature sequences called codewords, which are subsets of a type of optical orthogonal code (OOC). The channel input/output consists of the superposition of several users codewords and at the receiver end an optical correlator extracts the information. In the parallel code constructions, presented in this report, each user j is assigned a subset Cj from a code C. The subsets are disjoint and their union is the whole set C. A new way to map the information bits is to insert up to L zeros before each codeword from Cj and let this represent information aswell. This gives high rates for active users but an investigation is needed to ensure that this does not compromise the systems wanted property of sending information with a small probability of errors for all users. Therefore a simulation environment has been implemented in Matlab. The result from these simulations shows that BER for the L parallel codes is acceptable and not much higher than for the traditional constructions. Because of the higher rate these construction should be preferred but an analysis if a hardware implementation is possible.

Today wireless transmission of data is becoming more and more popular and the need for faster transmission rates is increasing. Since the bandwidth is limited it is important to try to use it to the fullest. CDMA is a technology that allows multiple accesses on the same frequency and time thus making it very bandwidth efficient. The CDMA technology was first introduced in the second generation’s cellular systems but has since then been improved and is reused in today’s 3G systems as Wideband CDMA. ISY is interested in getting a behavioural model of a W-CDMA system since they had developed a DSP processor called BBP1 and were thinking about adding W-CDMA support for it. Even though our system is not implemented on the BBP1 it should provide a good base for future implementations. This thesis project will describe the construction of a behavioural model of a W-CDMA system following the standard specified by 3GPP. The system simulates W-CDMA transmission and reception and has an optional channel used to simulate real world interference. The receiver uses a rake combiner to improve the performance of the system.

Depuis la première génération de téléphone mobile, de nombreuses fonctions et outils ont été intégrés dans nos terminaux. Il y a vingt ans, nous utilisions nos téléphone pour émettre des appels et envoyer/recevoir des messages. Aujourd’hui, l’accès à internet, la radio, l’appareil photo, des jeux et de la musique sont des fonctionnalités que l’on retrouve dans nos téléphones mobiles.Dans un contexte de téléphonie pouvant adresse plusieurs standards, l’objectif de cette thèse est de concevoir et de réaliser l’implémentation d’une architecture capable d’améliorer la linéarité de notre émetteur pour le standard 3G, utilisant des composants analogiques et numériques. Pour cela, notre étude se concentrera sur l’amélioration de la linéarité, tout en maintenant une consommation la plus faible possible mais également tout en évitant d’augmenter la taille d’une puce 3G. Nous allons démontrer qu’il est possible d’intégrer une technique de linéarisation tout en maintenant une consommation et une surface en silicium.Le premier chapitre présente différentes architectures d’émetteurs et des techniques de linéarisation avec leurs avantages et inconvénients. Il est également présenté des moyens d’évaluer l’efficacité d’un émetteur par des simulations ou des mesures. L’objectif de cette partie est de choisir une technique de linéarisation à laquelle nous associerons une architecture d’émetteur afin de répondre le plus rigoureusement à notre application et ces contraintes émanant.Le second chapitre détaille le fonctionnement du système complet, la partie numérique et la partie analogique, s’appuyant sur des études théoriques. Nous commencerons en détaillant les contraintes et les précautions qui doivent être prises en compte par le concepteur afin d’étudier l’instabilité et le bruit produit par l’émetteur. Nous décrierons alors deux algorithmes numériques permettant de réaliser la correction des signaux. Des simulations au niveau système de la boucle Cartésienne seront également présenté utilisant, dans un premier temps un amplificateur de puissance idéal, pour ensuite utilisé un amplificateur de puissance réalisé en technologie BiCMOS, et finalement un amplificateur de puissance conçu en technologie CMOS, qui est celle choisie pour notre étude.Le troisième chapitre présente la synthèse de la partie numérique en technologie CMOS des deux algorithmes précédemment cités, elle prend en compte toutes les étapes ; du code VHDL jusqu’au layout, permettant de réaliser un circuit numérique. Ensuite, il est décrit chaque composant de la boucle cartésienne, avec leurs propres simulations ou mesures. De plus, il est important de garder à l’esprit que l’objectif de cette thèse repose sur l’intégration du système complet (partie analogique et numérique) en technologie CMOS 65nm de STMicroelectronics, démontrant ainsi la faisabilité de la solution.Dans un premier temps, nous décrirons la partie numérique permettant de réaliser les étapes de correction de phase et de soustraction des signaux en technologie ASIC. L’algorithme de CORDIC a pour avantage de minimiser la consommation et l’occupation en Silicium de la partie analogique. Par la suite, l’architecture et les spécifications de chaque brique de base constituant la partie analogique seront présentées. Dans notre cas, la chaîne directe est composée de filtres, de mélangeurs, et d'un amplificateur de puissance. Notre objectif est de réaliser ces trois fonctions avec le minium de consommation et une surface du circuit la plus faible possible, ceci permettant une intégration plus aisée.Finalement, les simulations système seront présentées utilisant le logiciel de simulation ADC (Advanced Design Software) d’Agilent pour la partie analogique. Des co-simulations ont été réalisées sur le système complet, utilisant SystemVue pour la partie numérique. Les simulations réalisant ADS nous ont fourni les performances de chaque brique de base s’appuyant sur les caractéristiques des transistors. / Since the first generation of mobile phones, a lot of functions, standards and tools have been integrated on handsets. Twenty years ago, consumers could use their mobile phones only to call and to send messages. Nowadays, internet access, radio, cameras, games and music are included and available as options for every mobile phone.All of these new services make the cost of production for a cellular phone more expensive. Despite that, industry has to find a solution to maintain their products the most attractive as possible including the large range of integrated functions.In the context of interaction with other standards, the aim of this thesis is to design and implement a chipset able to improve the linearity of a transmitter for third generation mobile phones, using both digital and analog technologies. For this purpose, the study will focus on the improvement of the linearity, keeping the consumption and the die area of the circuit as small as possible. We will prove that linearization on an integrated circuit is possible with almost the same consumption and die area occupation compared to a classic transmitter.The first chapter presents the different architectures used for a transmitter and various linearization techniques with their advantages and drawbacks. Some metrics are also presented in order to evaluate these architectures. The goal of this part is to choose a linearization technique associated to a transmitter in order to fit with our application and constraints.The second chapter explains the complete system, digital and analog parts, with theoretical studies. We will start by detailing the constraints and precautions that must be taken into account by the designer to study the instability and the noise generated by the transmitter. We will describe how two algorithms make signal corrections. In the last part we will show system level simulations of the Cartesian Feedback using, first, an ideal power amplifier (PA), then, a PA in a BiCMOS technology, and finally, a PA in a CMOS technology that will be used for the final integrated circuit.The third and last chapter shows the digital synthesis in a CMOS technology of the two algorithms previously mentioned, considering all steps, from the VHDL code until the layout of the digital part. We will describe and simulate each analog building block of the Cartesian Feedback, with the measurement results for some of them. Each chapter will be working towards the goal of this study, demonstrated in this part: to make an integrated system, with its complete solution and simulations.This chapter presents the integration of the analog and digital Cartesian Feedback described previously in 65nm CMOS technology from STMicroelectronics. First, the digital part generating the phase correction and subtraction will be shown in ASIC technology, with a CORDIC algorithm to reduce its consumption and size. Secondly, the architecture and specification of building blocks will be shown. In our case, the direct path is composed of filters, RF modulator and a Power Amplifier. Our objective is to design these three functions to minimize the consumption and the silicon area of the integrated architecture. Finally, system level simulations will be presented using the ADS (Advanced Design Software) from Agilent for the analog part. Co-simulations have been done to analyze the whole system, with SystemVue for the digital part. The simulations using ADS will provide the performance of each building block on the transistors level.

[pt] Esta tese apresenta novas estruturas e algoritmos adaptativos para detecção às cegas de sinais DS-CDMA. São investigados receptores cegos com restrições lineares baseados nas funções custo de mínima variância (CMV) e módulo constante (CCM). Algoritmos adaptativos do tipo Affine-Projection para estimação dos parâmetros do receptor são desenvolvidos e seu desempenho em estado estacionário é analisado. Também são apresentados algoritmos adaptativos para estimação às cegas do canal de comunicações. Em seguida, novas estruturas de canceladores de interferência são propostas. Primeiramente um cancelador de interferência paralelo (PIC) linear baseado na função custo CCM é proposto. Em seguida é desenvolvido um novo esquema não-supervisionado de cancelamento sucessivo de interferência (SIC), baseado no conceito de arbitragem paralela. Por fim, é apresentado um esquema híbrido (HIC) que combina a estrutura SIC com uma estrutura multi- estágio, resultando em melhores estimativas para detecção e desempenho uniforme para os usuários do sistema. / [en] This thesis presents new structures and adaptive algorithms for blind detection of DS-CDMA signals. Linearly constrained minimum variance (CMV) and constant modulus (CCM) receivers are investigated. Blind adaptive Affine- Projection like algorithms for receiver parameter estimation are derived and its steady-state performance is analyzed. Blind adaptive channel estimation algorithms are also presented. This work also proposes new interference cancellation structures. Firstly, a blind linear parallel interference canceller (PIC) based on the CCM cost function is proposed. Secondly, a new non-supervised serial interference canceller (SIC) based on the parallel arbitration concept is developed. Finally, an hybrid interference cancellation scheme (HIC) which combines SIC and multiple PIC stages is presented.

Programa AlÃan de bolsas de estudo de alto nÃvel destinado à AmÃrica Latina / Este trabalho tem como objetivo a aplicaÃÃo da anÃlise tensorial para o tratamento de sinais no domÃnio de comunicaÃÃes sem fio. Utilizando a decomposiÃÃo tensorial conhecida como PARAFAC (decomposiÃÃo por fatores paralelos), um receptor à modelado para um sistema de comunicaÃÃo sem fio que utiliza uma estrutura MIMO na qual cada antena transmissora possui um cÃdigo de espalhamento particular, baseado na tÃcnica de mÃltiplo acesso por divisÃo de cÃdigo (CDMA). Nesse trabalho sÃo analisadas duas estruturas receptoras baseadas na decomposiÃÃo PARAFAC. A primeira à baseada no conhecimento da matriz de cÃdigos de espalhamento e a segunda à baseada no conhecimento da matriz de seqÃÃncia de treinamento. Duas famÃlias de cÃdigos sÃo consideradas: cÃdigos de Hadamard-Walsh e cÃdigos de Hadamard-Walsh truncados. Como resultado, foi observado que os receptores propostos apresentaram rÃpida convergÃncia e foram capazes de eliminar todas as ambigÃidades, inclusive aquelas que sÃo intrÃnsecas à decomposiÃÃo PARAFAC, que foram observadas em outros trabalhos. Resultados de simulaÃÃo sÃo apresentados para comparar o desempenho das duas estruturas receptoras em diversas configuraÃÃes do sistema de comunicaÃÃo, revelando o impacto dos parÃmetros do sistema (nÃmero de antenas transmissoras, nÃmero de antenas receptoras, tamanho do cÃdigo e relaÃÃo sinal-ruÃdo). / This work deals with the application of multi-way analysis to the context of signal processing for wireless communications. A tensor decomposition known as PARAFAC (PARAllel FACtors) is considered in the design of multiple-input multiple-output (MIMO) receiver for a wireless communication system with Spread Spectrum codes. We propose two supervised PARAFAC-based receiver structures for joint symbol and channel estimation. The first one is based on the knowledge of the spreading codes and the second on the knowledge of a training sequence per transmit antenna. Two code structures are considered, which are Hadamard-Wash (HW) and Truncated Hadamard-Walsh (THW). The main advantages of the proposed PARAFAC receivers is on the fact that they exhibit fast convergence and eliminate all ambiguities inherent to the PARAFAC model. Simulation results are provided to compare the performances of the two receivers for several systems configurations, revealing the impact of the number of transmit antennas, number of receiver antennas, code length and signal to noise ratio in their performances.