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M.Ing. / Please refer to full text to view abstract

Most mineral and coal processing plants are forced to size their particulate streams in order to maximize the efficiency of their unit operations. Classifiers are generally considered to be more practical than screens for fine sizing, but the separation efficiency decreases dramatically for particles smaller than approximately 150 μm. In addition, classifiers commonly suffer from bypass, which occurs when a portion of the ultrafine particles (slimes) are misplaced by hydraulic carryover into the oversize product. The unwanted misplacement can have a large adverse impact on downstream separation processes. One method of reducing bypass is to inject water into the cyclone apex. Unfortunately, existing water injection systems tend to substantially increase the particle cut size, which makes it unacceptable for ultrafine sizing applications. A new apex washing technology was developed to reduce the bypass of ultrafine material to the hydrocyclone underflow while maintaining particle size cuts in the 25-50 m size range. Another method of reducing bypass is to retreat the cyclone underflow using multiple stages of classifiers. However, natural variations in the physical properties of the feed make it difficult to calculate the exact improvement offered by multistage classification in experimental studies. Therefore, several mathematical equations for multistage classification circuits were evaluated using mathematical tools to calculate the expected impact of multistage hydrocyclone circuits on overall cut size, separation efficiency and bypass. These studies suggest that a two-stage circuit which retreats primary underflow and recycles secondary overflow offers the best balance between reducing bypass and maintaining a small cut size and high efficiency. / Master of Science

by Fan Chun-Wah. / Thesis (M.Phil.)--Chinese University of Hong Kong, 1998. / Includes bibliographical references (leaves 90-[91]). / Abstract also in Chinese. / Chapter CHAPTER 1: --- INTRODUCTION --- p.1 / Chapter CHAPTER 2: --- BACKGROUND OF INJECTION LOCKING --- p.3 / Chapter 2.1 --- Basics of Injection Locking --- p.3 / Chapter 2.2 --- Analytical Methods for Injection Locking --- p.6 / Chapter 2.2.1 --- Analysis of Fundamental Mode Injection Locking --- p.6 / Chapter 2.2.2 --- Analysis of Ha rmonic/Subharmonic Injection Locking --- p.9 / Chapter 2.4 --- Numerical Methods --- p.11 / Chapter CHAPTER 3: --- THE VOLTERRA SERIES METHOD FOR NONLINEAR CIRCUIT ANALYSIS --- p.13 / Chapter 3.1 --- Volterra Expansion --- p.14 / Chapter 3.2 --- Evaluation of Nonlinear Transfer Function --- p.16 / Chapter 3.2.1 --- Probing Method --- p.16 / Chapter 3.2.2 --- Nonlinear Current Method --- p.17 / Chapter 3.2.3 --- Higher order nonlinear current --- p.20 / Chapter 3.2.4 --- Voltage response by using nonlinear transfer function --- p.20 / Chapter 3.3 --- Advantage of Volterra Series --- p.21 / Chapter 3.4 --- Volterra Series Simulator(VSS) Implementation --- p.22 / Chapter 3.4.1 --- Admittance Matrix Formulation --- p.22 / Chapter 3.4.2 --- Evaluation of Nonlinear Response --- p.26 / Chapter 3.4.3 --- Local Cache and Global Cache --- p.26 / Chapter 3.4.4 --- Components Library --- p.27 / Chapter 3.4.5 --- Verification of Simulator --- p.27 / Chapter CHAPTER 4: --- VOLTERRA SERIES GENERAL INJECTION-LOCKED OSCILLATOR FORMULATION --- p.28 / Chapter 4.1 --- Volterra Series Approach to Analysis of Autonomous System --- p.29 / Chapter 4.1.1 --- Chua and Tang's work --- p.29 / Chapter 4.1.2 --- Cheng and Everard's work --- p.29 / Chapter 4.1.3 --- Huang and Chu 's work --- p.30 / Chapter 4.2 --- A Novel Approach --- p.33 / Chapter 4.3 --- Derivation of Determining Equation --- p.35 / Chapter 4.4 --- Injection Lock vector and circuit synthesis --- p.38 / Chapter 4.5 --- Modification to Volterra Series Simulator (VSS) --- p.40 / Chapter CHAPTER 5: --- CIRCUIT MODELING AND PARAMETER EXTRACTION --- p.42 / Chapter 5.1 --- Forward-Bias Gate Measurement --- p.42 / Chapter 5.2 --- Low FREQUENCY S-PARAMETER MEASUREMENT --- p.50 / Chapter 5.3 --- Parameter Extraction from High Frequency S-Parameter Data --- p.52 / Chapter 5.3.1 --- Direct Extraction Method --- p.52 / Chapter 5.3.2 --- Estimation of lead inductance --- p.56 / Chapter 5.4 --- Large Signal Characterization and Extraction --- p.59 / Chapter 5.4.1 --- Large Signal Model --- p.59 / Chapter 5.4.2 --- Extraction of g2 and g3 --- p.60 / Chapter 5.5 --- Equivalent circuit model for inductor and capacitor --- p.67 / Chapter CHAPTER 6: --- APPLICATION TO 1/3 ANALOG FREQUENCY DIVIDER --- p.68 / Chapter 6.1 --- Oscillator design by negative resistance approach --- p.68 / Chapter 6.2 --- Simulation of Free Running Oscillation by VSS --- p.73 / Chapter 6.3 --- Simulation of injection locked oscillator by VSS --- p.75 / Chapter 6.4 --- Injection Locking Experiment --- p.77 / Chapter 6.5 --- Injection Lock Vector --- p.80 / Chapter CHAPTER 7: --- CONCLUSIONS AND RECOMMENDATIONS FOR FUTURE WORK --- p.85 / Chapter 7.1 --- Conclusions --- p.85 / Chapter 7.2 --- Recommendations for Future Work --- p.86 / APPENDIX 1: REFERENCES --- p.87 / APPENDIX 2: PUBLICATION --- p.91

Thesis (Ph. D.)--University of Washington, 2003. / Vita. Includes bibliographical references (leaves 83-89).

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Thesis (M.S.)--University of Missouri-Columbia, 2006. / The entire dissertation/thesis text is included in the research.pdf file; the official abstract appears in the short.pdf file (which also appears in the research.pdf); a non-technical general description, or public abstract, appears in the public.pdf file. Title from title screen of research.pdf file (viewed on April 17, 2009) Includes bibliographical references.

This thesis deals with the modelling and circuit simulation problems of nonlinear electronic devices. Emphasis has been aimed at MOSFET devices. A Piecewise Linear (PWL) modelling scheme has been proposed for a general four-terminal nonlinear charge device. The charge functions are all nonlinear and are approximated by PWL functions. If analytical expressions for the nonlinear functions are not available, PWL function approximations can be built from a data table in which discrete data points are recorded. In the time domain, the critical-damping-adjustment (CDA ) scheme is used as the integration rule in the discretization of dynamic charge devices. Piecewise linear modelling combined with the CDA integration scheme gives a fast yet adequately accurate simulation algorithm. The algorithm is based on linear analysis because the entire circuit becomes linear with PWL modelling of nonlinear elements. In order to avoid an iterative solution, PWL region extrapolation is permitted when the circuit solution switches PWL regions. The extrapolation approximation will generate an overshoot error in the solution vector. However, with caution in the selection of the integration step size, the error can be limited to an acceptable range. Two types of MOSFETs have been modelled and simulated with the algorithm introduced in this thesis, and satisfactory results have been obtained as compared to Newton's iteration solutions. / Applied Science, Faculty of / Electrical and Computer Engineering, Department of / Graduate