Thesis (M.S.)--Ohio University, March, 2004. / Includes bibliographical references (p. 115-122).

Thesis (Ph. D.)--University of Washington, 1996. / Vita. Includes bibliographical references (p. [138]-146).

Thesis (Ph. D.)--University of Wisconsin--Madison, 1970. / Typescript. Vita. eContent provider-neutral record in process. Description based on print version record. Includes bibliographical references.

Thesis (M.S.)--Ohio University, March, 2004. / Title from PDF t.p. Includes bibliographical references (p. 115-122)

One of the basic requirements of communication protocols in a heterogeneous computer network is a standard external data-transfer representation. Abstract Syntax Notation One (ASN.1) has been widely used in international standard specifications. Its transfer-syntax of Basic Encoding Rules (BER) is applied as the standard external data representation. This thesis presents an efficient BER implementation, called the ED library. The ED library includes a number of encoding and decoding routines that may be used as primitive functions to compose encoders and decoders for arbitrarily complicated ASN.1 data-types. The Performance of the ED library is measured and discussed. Based on the ED library, an ASN.1-C compiler, called CASN1, is designed and implemented to release communication software programmers from the arduous work of translating protocol-defined data-types and constructing their encoders and decoders. Given an ASN.1 protocol specification, CASN1 automatically translates the input ASN.1 modules into C and generates the BER encoders and decoders for the protocol denned data-types. This thesis discusses the design principles, user interface, internal structures, and the implementation and of CASN1. Example applications are given. Both the ED library and CASN1 are implemented in C on UNIX 4.2 BSD using the YACC and LEX tools. / Science, Faculty of / Computer Science, Department of / Graduate

No description available.

Reducing circuit complexity to minimize design turnaround time and maximize chip area utilization is the most evident problem in dealing with VLSI layout. Three suggestions have been recommended to reduce circuit complexity. They are using regular modules as design targets, using hierarchical top-down design as a design methodology, and using CAD as a design tool. These three suggestions are the basis of this dissertation project. In this dissertation, three silicon compilers were implemented which take an universal AHPL circuit description as an input and automatically translate it into SLA (Storage Logic Array), PPLA (Path Programmable Logic Array), and ULA (Uncommitted Logic Array) chip layout. The goal is to study different layout algorithms and to derive better algorithms for alternative VLSI structures. In order to make a precise chip area comparison of these three silicon compilers, real SLA and ULA circuits have been designed. Four typical AHPL descriptions of different circuits or varying complexity were chosen as comparison examples. The result shows that the SLA layout requires least area for circuit realization generally. The PPLA approach is the worst one for large scale circuit realization, while the ULA lies in between.

The subject of this investigation is a specific set of parsers known as LR parsers. Of primary interest is a LR parsing method developed by DeRemer which specifies a translation method which can be defined by a Deterministic Push-Down Automation (DPDA). The method of investigation was to apply DeRemer's parsing technique to a specific language known as THIS Programming Language (TPL). The syntax of TPL was redefined as state diagrams and these state diagrams were, in turn, encoded into two tables--a State-Action table and a Transition table. The tables were then incorporated into a PL/l adaptation of DeRemer's algorithm and tested against various TPL statements.

Typescript (photocopy). / Digitized by Kansas Correctional Industries / Department: Computer Science.

Typescript (photocopy). / Digitized by Kansas Correctional Industries / Department: Computer Science.