<p>Bølgeprober og direksjonelle koblere er rene passive kretser. Dette betyr at de bruker passive komponenter, og dermed ikke har evne til å forsterke signaler. Eksempler på passive komponenter er lyspærer, lysdioder, motstander, motorer, batterier, spoler og kondensatorer. I tillegg kommer for eksempel brytere, vendere, koblingsklemmer, ledninger, transmisjonslinjer og viahull for sammenkobling av de ulike kretselementene avhengig av hva slags teknologi som benyttes. For bølgeproben og den direksjonelle kobleren er det bare viahull, transmisjonslinjer, spoler og kondensatorer som er aktuelle komponenter. Denne diplomoppgaven tar hovedsaklig for seg bølgeprober. Disse konstrueres i GaAs ved bruk av MMIC-teknologi. Ved å plassere en bølgeprobe i nærheten av en bølgeledene struktur(Som i denne oppgaven er en transmisjonslinje i metall to) vil det eletriske feltet(E-feltet) og magnetiske feltet(H-feltet) til den bølgeledene strukturen sette opp strømmer i bølgeproben. Direktivitet og effekt på utgangsportene er de viktigste faktorene for bølgeprobene. Direktivitet er differansen mellom de to utgangsportene. Oppgaven ser også på den direksjonelle kobleren som ble designet i prosjektoppgaven før jul. Denne benytter seg av samme teknologi og har en senterfrekvens på 5.8 GHz. Den direksjonelle kobleren har fire porter; èn inngangsport, èn isolert port og to utgangsporter. Signalet deles likt mellom de to utgangsportene, men det ene signalet er forskyvet $90^{circ}$ i forhold til det andre. For bølgeprobene er hovedfokuset å optimalisere de som allerede er produsert. Det er i alt åtte bølgeprober; en type som går inn i metall null og opp i metall èn(type1) og en type som går inn i metall èn og ned i metall null(type2). De har bredde på 10 um, 20 um, 50 um og 100 um. Optimaliseringen gir bølgeprobene mer gunstige signalverdier på utgangene. Spolene i den direksjonelle kobleren tas også for seg i denne oppgaven. Dette er for å se på kapasitiv kobling mellom spolesegmenter i en spole og på kobling mellom flere spoler. Resultatene brukes for beskrive hvordan spolene bør plasseres når det lages utlegg for blant annet en koblerkrets. Kondensatorene har ingen koblingseffekter som påvirker resten av kretsen, siden disse oppfører seg som idelle komponenter ved 5.8 GHz. De blir dermed ikke analysert. I instrumenteringsdelen blir det tatt for seg måling på laboratorium ved bruk av måleprobestasjon og VNA. Det blir også målt på de allerde produserte bølgeprobene for å kartlegge signalverdiene ved utgangene og for å sammenligne med de simulerte verdiene fra textit{Advanced Design System}(ADS). Det blir også målt på ulike spoler for å se på kapasitiv kobling i spoler og for å analysere kobling mellom spoler. Disse blir også sammenlignet med simulerte resultater fra ADS. Det viser seg at de målte og simulerte verdiene avviker litt fra hverandre. Dette kommer av unøyaktigheter i kalibreringen av måleprobene, og ulike parasittiske effekter knyttet til blant annet kanteffekter på paddene der måleprobene plasseres. De produserte bølgeprobene blir tatt for seg videre i metodedelen for optimalsering. Ved å justere posisjonen til bølgeproben i forhold til den bølgeledene strukturen finnes en posisjon som gir mest gunstige signalerverdier på utgangsportene til bølgeprobene. Det viser seg at det er best å plassere sløyfen til bølgeprobene nær kanten av den bølgeledene strukturen. Dette gjelder for alle de produserte bølgeprobene. Det viser seg også at type1-bølgeprobene jevnt over er de beste bølgeprobene. Disse legges derfor hovedvekt på videre i optimaliseringsprosessen. Resultatene fra simuleringene viser også at de smale bølgeprobene(10 um og 20 um) er de med best direktivitet, mens de brede bølgeprobene(50 um og 100 um) er de med mest gunstig effekt på utgangsportene. Det er ønskelig at effekten ligger opp mot -20dB på port tre på bølgeproben. Effekten på port fire bør være uendelig liten for å gi best mulig direktivitet. Videre er noen av bølgeprobene blitt optimalisert ved å forandre på sløyfebredden og ved å forkorte lederene, som forbinder bølgeprobens sløyfe med utgangsportene. Dette gir enda bedre resultat med tanke på direktivitet og effekt på utgangsportene for noen av bølgeprobene. De optimaliserte bølgeprobene er fullverdige for bruk i for eksempel ulike tilbakekoblingssystemer eller for å lage nøyaktige transistormodeller på en enkel måte.</p>

<p>Denne masteroppgaven tar for seg en totrinns Dohertyforsterker på 2.4 GHz. De to delforsterkerne er identiske klasse AB effektforsterkere, og «Auxillary»-forsterkerens påslag styres av et variabelt dempeledd. I tillegg til dempeleddet og delforsterkerne består systemet av en kobler, en envelopedetektor og en effektsplitter. Alle delkretsene er designet og produsert, og simuleringer og målinger på disse hver for seg er foretatt. Sammenkoblingen av alle delkretsene til det fullstendige systemet er ikke utført på grunn av tidsmangel og uforutsette komplikasjoner. Utfyllende teori for Dohertyforsterkeren og delkretsene den består av er presentert, samt en detaljert beskrivelse av design-, produksjon- og målemetode. Dempeleddet ble valgt til å ha -konfigurasjon, og utifra måleresulatene konkluderes det med at konfiguarasjonen muligens burde vært en annen. Det samme gjelder for envelopedetektoren som skal gi dempeleddet riktig styresignal; denne er trolig for enkel til å kunne benyttes i en god Dohertyforsterker.</p>

<p>I denne oppgaven er det blitt studert hvilket effektivitetsforbedringspotensial det ligger i å bruke envelope tracking-teknikken på en RF-forsterker med et amplitudevarierende inngangssignal. Denne teknikken går i grove trekk ut på å dynamisk forspenne RF-transistoren i forsterkeren i variasjon med inngangssignalet slik at effektiviteten blir best mulig, samtidig som forsterkerens linearitetsegenskaper bevares. En metode for å realisere denne teknikken er blitt presentert og består hovedsaklig av tre deler. Disse tre delene er en kobler, en envelopedetektor og en driverkrets. De to sistenevnte delkretsene har i denne oppgaven blitt analysert, designet og simulert. Deretter ble delkretsene produsert og funksjonaliteten ble målt. Den fysiske envelopedetektoren opererte ikke helt på ønsket måte. For de høyeste inngangseffektene detekterte den envelopen veldig godt, men for de aller laveste klarte den ikke å detektere noe som helst. Hvor godt den klarte å følge envelopen varierte også med envelopefrekvensen. Driveren ble realisert med en komponent som den egentlig ikke var tiltenkt på grunn av noen tekniske problemer. På grunn av båndbreddebegrensning i denne nye komponenten ble driveren undersøkt på lavere frekvens en planlagt, men på denne frekvensen opererte driveren på tilfredsstillende måte.</p>

<p>Denne oppgaven tar for seg avstråling fra en platehøyttaler (såkalt Distributed Mo- de Loudspeaker, DML). Ved hjelp av simuleringer av panelet med endelig element- metoden i COMSOL Multiphysics, beregning av avstråling ved det diskretiserte Rayliegh-integralet i MATLAB og sammenligning med tidligere målearbeider, har en kartlagt egenskapene til høyttaleren. Oppgaven er vel så mye en studie i bruk av numeriske verktøy, og deres begrensinger, som med platemekanikk.</p>

<p>Linear power amplication is important in radio communications to achieve high bitrates. Strong regulations of the frequency spectrum force manufacturers to use complex modulation schemes to increase the capacity. More linear ampliers can use more complex modulation schemes like the 64 Quadrature Amplitude Modulation (QAM). In addition will a linearized amplier allow for increased output power and better efficiency. Digital predistortion is one of the more successful methods of amplier linearization. By distorting a signal before it reaches the PA, the nonlinearities of the PA may repair the distorted signal instead of damaging it. A behavioral model is created using 16QAM modulated excitation signals. The PA model is based on empirical measurements. An open loop predistorter based on lookup tables corrects the I and Q channels in base band. The predistorter is created and simulated using AWR VSS. A predistorter with a fairly small look-up table of 1008 entries shows an average reduction of third order IM levels of 18,3 dB, and fth order IM levels of 9,3 dB. Even when using mismatched lookup tables, an average reduction of 10,3 dB for IM3 and 4,4 dB for IM5 is achieved.</p>

<p>This thesis investigates the obtainable performance improvements associated with different fading mitigation techniques using spatial antenna diversity applied to the IEEE 802.15.4 2.4 GHz PHY. The standard possesses modulation properties that inherently provide some multipath resistance. Further resistance is believed obtainable due to the bad and unpredictable fading environments found in typical areas of application. Potential performance increases were theoretically analyzed for different fading channel statistics when two antennas were available for reception. This analysis provided upper bounds for achievable performance improvements that were promising. Physical testing of selected fading mitigation techniques was performed with hardware from Texas Instruments and means developed by the student. Generally, the PHY has proven itself multipath resistant in the various fading environments tested. PER has been showed to mostly consist of undetected packets. As such, fading mitigation techniques using two receiver chains provide the greatest reduction in PER in a general case, since more packets are detected. PER is observed reduced by a test-dependant factor between 2 and 100 for such techniques. Techniques based on one RF-front end generally provides little performance improvement in dynamic environments, if any. Large spatial differences in received power were observed across distances on the order of a wavelength. A simple technique that switches receiver antenna when detecting an erroneously demodulated packet can exploit this property when RX and TX remain static and hence provide great reductions in PER. This fading mitigation technique is the least complex and power consuming among the ones analyzed and tested.</p>

<p>PREFACE This master’s thesis was written as the final step towards my master’s degree, and it thereby marks the ending of my time at NTNU. The master’s thesis was developed due to a proposal made by Texas Instruments, under the offered supervision of Oddgeir Fikstvedt. My supervisor at NTNU was Morten Olavsbråten. This report describes the design of a power amplifier in the 90nm CMOS technology. The power amplifier is designed to deliver 1W output power at 5.8GHz with a peak efficiency of 50%. Both the class-E and the inverse class-D amplifier are described and examined, but the final choice in amplifier design is the inverse class-D amplifier. Simulation results on a realistic inverse class-D amplifier model are presented as the final outcome. Trondheim, 2009-07-16 Nina Tofte Røislien ABSTRACT Recently CMOS has been introduced as a technology for RF-front end applications. This results in higher levels of integration, which saves fabrication cost and area. The power amplifier often contributes to the highest power consumption, and the efficiency becomes very important. This master’s thesis handles the design of a CMOS power amplifier at 5.8GHz. The design goals were an output power of 30dBm, a Power Added Efficiency of 50% and a gain of 25dB. The main challenge in the CMOS-technology is the low breakdown voltage. This leads to a higher current and a lower load resistance compared to traditionally used RF-technologies. This makes it harder to design a high efficiency amplifier because of more power loss in the parasitic, and a more complex matching network. Two different amplifiers were investigated, both of the switching type; the class-E amplifier and the inverse class-D amplifier (current mode). The class-E amplifier has been studied by others for this kind of use, and has an advantage because of the load network that is synthesized to give non-overlapping voltage and current, even if the device switching time is appreciable fractions of the ac cycle. One can also utilize the high output capacitance of the CMOS-transistor as part of the load network. The inverse class-D amplifier has an advantage of being differential which provides a higher voltage swing across the load, and thereby a higher load resistance and a lower current compared to the class-E. In contrast with conventional voltage-mode class-D amplifiers, the inverse class-D features “zero voltage switching” which eliminates the output capacitance discharge loss. This output capacitance is also utilized as part of the resonance filter in the load network. No previous work of others that uses the inverse class-D amplifier in a similar configuration (RF, CMOS) was discovered. It was found that the inverse class-D amplifier was the best suited for this application. The load resistance of the class-E amplifier became too low compared to the parasitic losses to achieve the design goals. The ground inductance was also totally destructive for the class-E waveforms because of the single-ended topology. Since the inverse class-D amplifier instantly showed much more promising behavior, no time was used trying to solve this problem. The resulting inverse class-D amplifier design has a peak efficiency of 51%, an output power of 30.04dBm. The gain is 25dB for an output power of 28dBm, but sadly it decreases below the design goal to 20.06dB at the point where Pout=30dBm and PAE=50%. ACKNOWLEDGEMENT I would like to give great thanks to Oddgeir Fikstvedt and Morten Olavsbråten for invaluable support during this time, and for making this thesis possible. I would also like to give great thanks Trond Ytterdal for his help with Cadence, and to Tore Barlindhaug for help with some fatal last minute Cadence problems.</p>

Linear power amplication is important in radio communications to achieve high bitrates. Strong regulations of the frequency spectrum force manufacturers to use complex modulation schemes to increase the capacity. More linear ampliers can use more complex modulation schemes like the 64 Quadrature Amplitude Modulation (QAM). In addition will a linearized amplier allow for increased output power and better efficiency. Digital predistortion is one of the more successful methods of amplier linearization. By distorting a signal before it reaches the PA, the nonlinearities of the PA may repair the distorted signal instead of damaging it. A behavioral model is created using 16QAM modulated excitation signals. The PA model is based on empirical measurements. An open loop predistorter based on lookup tables corrects the I and Q channels in base band. The predistorter is created and simulated using AWR VSS. A predistorter with a fairly small look-up table of 1008 entries shows an average reduction of third order IM levels of 18,3 dB, and fth order IM levels of 9,3 dB. Even when using mismatched lookup tables, an average reduction of 10,3 dB for IM3 and 4,4 dB for IM5 is achieved.

This thesis investigates the obtainable performance improvements associated with different fading mitigation techniques using spatial antenna diversity applied to the IEEE 802.15.4 2.4 GHz PHY. The standard possesses modulation properties that inherently provide some multipath resistance. Further resistance is believed obtainable due to the bad and unpredictable fading environments found in typical areas of application. Potential performance increases were theoretically analyzed for different fading channel statistics when two antennas were available for reception. This analysis provided upper bounds for achievable performance improvements that were promising. Physical testing of selected fading mitigation techniques was performed with hardware from Texas Instruments and means developed by the student. Generally, the PHY has proven itself multipath resistant in the various fading environments tested. PER has been showed to mostly consist of undetected packets. As such, fading mitigation techniques using two receiver chains provide the greatest reduction in PER in a general case, since more packets are detected. PER is observed reduced by a test-dependant factor between 2 and 100 for such techniques. Techniques based on one RF-front end generally provides little performance improvement in dynamic environments, if any. Large spatial differences in received power were observed across distances on the order of a wavelength. A simple technique that switches receiver antenna when detecting an erroneously demodulated packet can exploit this property when RX and TX remain static and hence provide great reductions in PER. This fading mitigation technique is the least complex and power consuming among the ones analyzed and tested.

PREFACE This master’s thesis was written as the final step towards my master’s degree, and it thereby marks the ending of my time at NTNU. The master’s thesis was developed due to a proposal made by Texas Instruments, under the offered supervision of Oddgeir Fikstvedt. My supervisor at NTNU was Morten Olavsbråten. This report describes the design of a power amplifier in the 90nm CMOS technology. The power amplifier is designed to deliver 1W output power at 5.8GHz with a peak efficiency of 50%. Both the class-E and the inverse class-D amplifier are described and examined, but the final choice in amplifier design is the inverse class-D amplifier. Simulation results on a realistic inverse class-D amplifier model are presented as the final outcome. Trondheim, 2009-07-16 Nina Tofte Røislien ABSTRACT Recently CMOS has been introduced as a technology for RF-front end applications. This results in higher levels of integration, which saves fabrication cost and area. The power amplifier often contributes to the highest power consumption, and the efficiency becomes very important. This master’s thesis handles the design of a CMOS power amplifier at 5.8GHz. The design goals were an output power of 30dBm, a Power Added Efficiency of 50% and a gain of 25dB. The main challenge in the CMOS-technology is the low breakdown voltage. This leads to a higher current and a lower load resistance compared to traditionally used RF-technologies. This makes it harder to design a high efficiency amplifier because of more power loss in the parasitic, and a more complex matching network. Two different amplifiers were investigated, both of the switching type; the class-E amplifier and the inverse class-D amplifier (current mode). The class-E amplifier has been studied by others for this kind of use, and has an advantage because of the load network that is synthesized to give non-overlapping voltage and current, even if the device switching time is appreciable fractions of the ac cycle. One can also utilize the high output capacitance of the CMOS-transistor as part of the load network. The inverse class-D amplifier has an advantage of being differential which provides a higher voltage swing across the load, and thereby a higher load resistance and a lower current compared to the class-E. In contrast with conventional voltage-mode class-D amplifiers, the inverse class-D features “zero voltage switching” which eliminates the output capacitance discharge loss. This output capacitance is also utilized as part of the resonance filter in the load network. No previous work of others that uses the inverse class-D amplifier in a similar configuration (RF, CMOS) was discovered. It was found that the inverse class-D amplifier was the best suited for this application. The load resistance of the class-E amplifier became too low compared to the parasitic losses to achieve the design goals. The ground inductance was also totally destructive for the class-E waveforms because of the single-ended topology. Since the inverse class-D amplifier instantly showed much more promising behavior, no time was used trying to solve this problem. The resulting inverse class-D amplifier design has a peak efficiency of 51%, an output power of 30.04dBm. The gain is 25dB for an output power of 28dBm, but sadly it decreases below the design goal to 20.06dB at the point where Pout=30dBm and PAE=50%. ACKNOWLEDGEMENT I would like to give great thanks to Oddgeir Fikstvedt and Morten Olavsbråten for invaluable support during this time, and for making this thesis possible. I would also like to give great thanks Trond Ytterdal for his help with Cadence, and to Tore Barlindhaug for help with some fatal last minute Cadence problems.