Hafnium oxide (HfO₂)-based ferroelectric field-effect transistor (FeFET) is an attractive device for nonvolatile memory. However, when compared to the well-established flash devices, the memory window (MW) of FeFETs reported so far is rather limited, which might be an obstacle to practical applications. In this article, we report on FeFETs fabricated in the 28-nm high-𝑘 metal gate (HKMG) bulk technology with 90 and 80 nm for the channel length and width, respectively, which show a large MW of nearly 3 V. This is achieved by adopting 20-nm-thick HfO₂ films in the gate stack instead of the usually employed 10-nm-thick films. We show that such a thickness increase leads to only a moderate increase of the switching voltages, and to a significantly improved resilience of the memory characteristics upon the parasitic charge trapping. The devices display a good retention at high temperatures and endure more than 10⁵ bipolar cycles, thus supporting this technology for a future generation of FeFET memories.

Despite increasing attention for the recently found ferro- and antiferroelectric properties, the polymorphism in hafnia- and zirconia-based thin films is still not sufficiently understood. In the present work, we show that it is important to have a good quality X-ray absorption spectrum to go beyond an analysis of the only the first coordination shell. Equally important is to analyze both EXAFS and XANES spectra in combination with theoretical modelling to distinguish the relevant phases even in bulk materials and to separate structural from chemical effects. As a first step toward the analysis of thin films, we start with the analysis of bulk references. After that, we successfully demonstrate an approach that allows us to extract high-quality spectra also for 20 nm thin films. Our analysis extends to the second coordination shell and includes effects created by chemical substitution of Hf with Zr to unambiguously discriminate the different polymorphs. The trends derived from X-ray absorption spectroscopy agree well with X-ray diffraction measurements. In this work we clearly identify a gradual transformation from monoclinic to tetragonal phase as the Zr content of the films increases. We separated structural effects from effects created by chemical disorder when ration of Hf:Zr is varied and found differences for the incorporation of the substitute atoms between powders and thin films, which we attribute to the different fabrication routes. This work opens the door for further in-depth structural studies to shine light into the chemistry and physics of these novel ferroelectric thin films that show high application relevance.

Neuron is the basic computing unit in brain-inspired neural networks. Although a multitude of excellent artificial neurons realized with conventional transistors have been proposed, they might not be energy and area efficient in large-scale networks. The recent discovery of ferroelectricity in hafnium oxide (HfO₂) and the related switching phenomena at the nanoscale might provide a solution. This study employs the newly reported accumulative polarization reversal in nanoscale HfO₂-based ferroelectric field-effect transistors (FeFETs) to implement two key neuronal dynamics: the integration of action potentials and the subsequent firing according to the biologically plausible all-or-nothing law. We show that by carefully shaping electrical excitations based on the particular nucleation-limited switching kinetics of the ferroelectric layer further neuronal behaviors can be emulated, such as firing activity tuning, arbitrary refractory period and the leaky effect. Finally, we discuss the advantages of an FeFET-based neuron, highlighting its transferability to advanced scaling technologies and the beneficial impact it may have in reducing the complexity of neuromorphic circuits.

Ferroelectric field effect transistor (FeFET) memories based on a new type of ferroelectric material (silicon doped hafnium oxide) were studied within the scope of the present work. Utilisation of silicon doped hafnium oxide (Si:HfO2) thin films instead of conventional perovskite ferroelectrics as a functional layer in FeFETs provides compatibility to the CMOS process as well as improved device scalability. The influence of different process parameters on the properties of Si:HfO2 thin films was analysed in order to gain better insight into the occurrence of ferroelectricity in this system. A subsequent examination of the potential of this material as well as its possible limitations with the respect to the application in non-volatile memories followed. The Si:HfO2-based ferroelectric transistors that were fully integrated into the state-of-the-art high-k metal gate CMOS technology were studied in this work for the first time. The memory performance of these devices scaled down to 28 nm gate length was investigated. Special attention was paid to the charge trapping phenomenon shown to significantly affect the device behaviour.

Ferroelectric field-effect transistors (FeFET) based on hafnium oxide offer great opportunities for Logic-in-Memory applications, due to their natural ability to combine logic (transistor) and memory (ferroelectric material), their low-power operation, and CMOS compatible integration. Besides aggressive scaling, dense integration of FeFETs is necessary to make electronic circuits more area-efficient. This paper investigates the impact of ultra-dense co-integration of a FeFET and an n-type selector FET, sharing the same active area, arranged in a 2TNOR memory array. The examined FeFETs exhibit a very similar switching behavior as FeFETs arranged in a standard AND-type array, indicating that the ultra-dense co-integration does not degrade the FeFET performance, and thus, paves the path to a very fine-grained, ultra-dense Logic-in-Memory implementation. Based on this densely integrated 2TNOR array we propose a very compact design of a 4-to-1 multiplexer with a build-in look-up table, thus directly merging logic and memory.

Ferroelectric field effect transistor (FeFET) memories based on a new type of ferroelectric material (silicon doped hafnium oxide) were studied within the scope of the present work. Utilisation of silicon doped hafnium oxide (Si:HfO2) thin films instead of conventional perovskite ferroelectrics as a functional layer in FeFETs provides compatibility to the CMOS process as well as improved device scalability. The influence of different process parameters on the properties of Si:HfO2 thin films was analysed in order to gain better insight into the occurrence of ferroelectricity in this system. A subsequent examination of the potential of this material as well as its possible limitations with the respect to the application in non-volatile memories followed. The Si:HfO2-based ferroelectric transistors that were fully integrated into the state-of-the-art high-k metal gate CMOS technology were studied in this work for the first time. The memory performance of these devices scaled down to 28 nm gate length was investigated. Special attention was paid to the charge trapping phenomenon shown to significantly affect the device behaviour.:1 Introduction 2 Fundamentals 2.1 Non-volatile semiconductor memories 2.2 Emerging memory concepts 2.3 Ferroelectric memories 3 Characterisation methods 3.1 Memory characterisation tests 3.2 Ferroelectric memory specific characterisation tests 3.3 Trapping characterisation methods 3.4 Microstructural analyses 4 Sample description 4.1 Metal-insulator-metal capacitors 4.2 Ferroelectric field effect transistors 5 Stabilisation of the ferroelectric properties in Si:HfO2 thin films 5.1 Impact of the silicon doping 5.2 Impact of the post-metallisation anneal 5.3 Impact of the film thickness 5.4 Summary 6 Electrical properties of the ferroelectric Si:HfO2 thin films 6.1 Field cycling effect 6.2 Switching kinetics 6.3 Fatigue behaviour 6.4 Summary 7 Ferroelectric field effect transistors based on Si:HfO2 films 7.1 Effect of the silicon doping 7.2 Program and erase operation 7.3 Retention behaviour 7.4 Endurance properties 7.5 Impact of scaling on the device performance 7.6 Summary 8 Trapping effects in Si:HfO2-based FeFETs 8.1 Trapping kinetics of the bulk Si:HfO2 traps 8.2 Detrapping kinetics of the bulk Si:HfO2 traps 8.3 Impact of trapping on the FeFET performance 8.4 Modified approach for erase operation 8.5 Summary 9 Summary and Outlook

Στη παρούσα Διατριβή διερευνήθηκε η χρήση υλικών υψηλής διηλεκτρικής σταθεράς (high-k) ως οξειδίων ελέγχου σε διατάξεις παγίδευσης φορτίου τύπου MONOS (Μetal-Οxide-Νitride-Οxide-Silicon). Τα οξείδια που εξετάστηκαν ήταν το HfO2, τo ZrO2 και το Al2O3. Η ανάπτυξή τους πραγματοποιήθηκε με χρήση της μεθόδου εναπόθεσης ατομικού στρώματος (ALD). Οι ιδιότητες των δομών μνήμης μελετήθηκαν συναρτήσει: (α) των πρόδρομων μορίων της εναπόθεσης για τα HfO2 και ZrO2, (β) του οξειδωτικού μέσου της εναπόθεσης για την περίπτωση του Al2O3 και (γ) της επακόλουθης ανόπτησης. Η ηλεκτρική συμπεριφορά των δομών εξετάστηκε με την κατασκευή πυκνωτών τύπου MOS. Τα υμένια του HfO2 αναπτύχθηκαν επί διστρωματικής στοίβας SiO2/Si3N4 με (α) αλκυλαμίδιο του χαφνίου (ΤΕΜΑΗ) και Ο3 στους 275 oC, και (β) κυκλοπενταδιενύλιο του χαφνίου (HfD-04) και Ο3 στους 350 οC. Ομοίως, τα υμένια του ZrO2 αναπτύχθηκαν επί διστρωματικής στοίβας SiO2/Si3N4 με: (α) αλκυλαμίδιο του ζιρκονίου (ΤΕΜΑΖ) και Ο3 στους 275 oC και (β) κυκλοπενταδιενύλιο του ζιρκονίου (ZrD-04) με Ο3 στους 350 oC. Ο δομικός χαρακτηρισμός, για το HfO2, φανέρωσε πως η ύπαρξη ή όχι κρυσταλλικού χαρακτήρα και η σύσταση του οξειδίου εξαρτάται τόσο από το πρόδρομο μόριο αλλά και από την ανόπτηση (600 οC, 2 min). Αντίθετα, το ZrO2 έχει σε κάθε περίπτωση κρυσταλλικότητα. Τα ηλεκτρικά χαρακτηριστικά των πυκνωτών Si/SiO2/Si3N4/high-k/Pt, δείχνουν ότι οι δομές έχουν ικανοποιητική συμπεριφορά ως στοιχεία μνήμης αφού όλες οι ιδιότητες πληρούν τις βασικές προϋποθέσεις ως στοιχεία μνήμης, παρά την ανυπαρξία ενεργειακού φραγμού μεταξύ στρώματος παγίδευσης και οξειδίου ελέγχου. Η ικανότητα παγίδευσης και η επίδοση των δομών με HfO2 και ZrO2 δεν διαφοροποιούνται σημαντικά με χρήση διαφορετικού πρόδρομου μορίου ή με την ανόπτηση. Ο έλεγχος όμως της αντοχής των δομών σε επαναλαμβανόμενους παλμούς εγγραφής/διαγραφής αναδεικνύει ότι αμφότερες οι δομές που ανεπτύχθησαν με βάση το κυκλοπενταδιενύλιο έχουν μειωμένη αντοχή ηλεκτρικής καταπόνησης. Τo Al2O3 αναπτύχθηκε χρησιμοποιώντας το μόριο ΤΜΑ και ως οξειδωτικό μέσο: (α) H2O, (β) O3 και (γ) Plasma Ο2 (μέθοδος PE-ALD) σε συνδυασμό με ΤΜΑ. Οι δομές στην αρχική κατάσταση, χωρίς ανόπτηση, χαρακτηρίζονται από ισχυρό ρεύμα έγχυσης ηλεκτρονίων από την πύλη (υπό αρνητικές τάσεις) περιορίζοντας την ικανότητα φόρτισης και την επίδοση διαγραφής. Η ανόπτηση σε φούρνο και αδρανές περιβάλλον (850 ή 1050 oC, 15 min) προκάλεσε σημαντική βελτίωση των ηλεκτρικών χαρακτηριστικών των δομών λόγω του σημαντικού περιορισμού του παραπάνω φαινομένου. Μετά το στάδιο της ανόπτησης οι συνδυασμοί ΤΜΑ/Η2Ο και ΤΜΑ/Plasma Ο2 έχουν καλύτερες χαρακτηριστικές σε σχέση με αυτές του συνδυασμού ΤΜΑ/Ο3. Το φαινόμενο της διαρροής ηλεκτρονίων από την πύλη αποδίδεται στη μεγάλη συγκέντρωση και χωρική κατανομή του υδρογόνου στο υμένιο υψηλής διηλεκτρικής σταθεράς. Τέλος, διερευνήθηκε η τροποποίηση των ιδιοτήτων μνήμης των δομών με εμφύτευση ιόντων αζώτου χαμηλής ενέργειας και υψηλής δόσης στο Al2O3 και επακόλουθη ανόπτηση υψηλής θερμοκρασίας. Η παρουσία αζώτου στο υμένιο καθώς και ο χημικός δεσμός του εμφυτευμένου αζώτου είναι συνάρτηση της θερμοκρασίας ανόπτησης. Επομένως, οι ιδιότητες μνήμης εξαρτώνται από τη μορφή σύνδεσης και την συγκέντρωση του εμφυτευμένου αζώτου στο τροποποιημένο Al2O3. Η υψηλή θερμοκρασία ανόπτησης (1050 οC, 15 min) φαίνεται να αποφέρει δομές με τις καλύτερες ιδιότητες μνήμης. / This thesis studies the functionality of high-k oxides as blocking oxide layers in SONOS type charge-trap memory devices. The oxide materials that were examined were the HfO2, the ZrO2 and the Al2O3. All these blocking oxide layers were deposited by atomic layer deposition technique (ALD). The electrical performance of the trilayer stacks was examined using Pt-gate MOS-type capacitors. The properties of the memory structures were examined as a function of: (a) precursor chemistry of HfO2 and ZrO2 deposition, (b) the deposition oxidizing agent in the case of Al2O3 and (c) subsequent high temperature annealing steps. The HfO2 films were deposited on SiO2/Si3N4 bilayer stacks using: (a) hafnium alkylamide (TEMAH) and O3 at 275 oC, and (b) hafnium cyclopentadienyl (HfD-04) and O3 at 350 oC. Similarly the ZrO2 films were deposited by (a) zirconium alkylamide (TEMAZ) and O3 at 275 oC, and (b) zirconium cyclopentadienyl (ZrD-04) and O3 at 350 oC The structural characterization of the HfO2 showed that the crystallinity of the deposited high-k material depends on the precursor choice and the post deposition annealing step (600 °C, 2 min). On the contrary ZrO2 is deposited in a crystalline phase independent of the deposition conditions and the choice of the precursors. The electrical characterization of Si/SiO2/Si3N4/high-k/Pt capacitors showed that all fabricated structures operate well as memory elements, despite the absence of an energy barrier between the trapping layer and control oxide. The trapping efficiency and the performance of structures with HfO2 or ZrO2 blocking layers do not revealed a dependence upon the precursor chemistry. However, endurance testing using continuous write/erase pulses showed that both structures deposited by cyclopentadienyl precursors cannot sustain the resulting electrical stress. The Al2O3 layers were deposited using the TMA molecule while three different oxidizing agents were used: (a) H2O, (b) O3 and (c) oxygen plasma. Electrical testing of the resulting Pt-gate trilayer capacitors showed that in the deposited condition all three samples were characterized by gate electrode induced electron leakage currents in the negative bias regime, which completely masked the substrate hole injection effects. This effect limits the performance and the functionality of the memory stacks. After a high temperature annealing step (850 or 1050 oC, 15 min) this leakage current is reduced significantly and the stacks can function as memory elements. The results point to suggest that after annealing the best performance is exhibited by the TMA/H2O and TMA/Plasma O2 samples. The effect of gate induced electron leakage current is attributed to hydrogen related contamination, which has been verified by ToF-ERDA in depth profile measurements, at least for the case of TMA/H2O samples. The modification of the memory properties of the SiO2/Si3N4/Al2O3 stacks was also investigated using low energy and high fluence nitrogen implantation into Al2O3 layer. The concentration and the chemical bonding of the implanted nitrogen is a function of annealing temperature. The memory properties of the stack depend therefore on the chemical bonding and the concentration of the remaining nitrogen in the modified Al2O3. The high temperature annealing (1050 oC, 15 min) appears to provide the structures with improved memory properties in terms of retention and fast erase performance.

Depuis l'invention du transistor MOS à effet de champ dans les années 60, l'exploitation de cette brique élémentaire a permis une évolution exponentielle du domaine de la microélectronique, avec une course effrénée vers la miniaturisation des dispositifs électroniques CMOS. Dans ce contexte, l'introduction des oxydes "high-κ" (notamment HfO2) a permis de franchir la barrière sub-nanométrique de l'EOT (Equivalent Oxide Thickness) pour l’oxyde de grille. Les travaux actuels concernent notamment la recherche de matériaux "high-κ" et de procédés qui permettraient d'avoir une interface abrupte, thermodynamiquement stable avec le silicium, pouvant conduire à des EOTs de l'ordre de 5Å. L’objectif de cette thèse, était d’explorer le potentiel de l’oxyde LaAlO3 amorphe déposé sur silicium par des techniques d’Épitaxie par Jets Moléculaires, en combinant des études sur les propriétés physico-chimiques et électriques de ce système. Le travail de thèse a d’abord consisté à définir des procédures d'élaboration sur Si de couches très minces (≈4nm), robustes et reproductibles, afin de fiabiliser les mesures électriques, puis à optimiser la qualité électrique des hétérostructures en ajustant les paramètres de dépôt à partir de corrélations entre résultats électriques et propriétés physico-chimiques (densité, stœchiométrie, environnement chimique…) et enfin à valider un procédé d'intégration du matériau dans la réalisation de MOSFET. La stabilité et la reproductibilité des mesures ont été atteintes grâce à une préparation de surface du substrat adaptée et grâce à l'introduction d'oxygène atomique pendant le dépôt de LaAlO3, permettant ainsi une homogénéisation des couches et une réduction des courants de fuite. Après optimisation des paramètres de dépôt, les meilleures structures présentent des EOTs de 8-9Å, une constante diélectrique de 16 et des courants de fuite de l'ordre de 10-2A/cm². Les caractérisations physico-chimiques fines des couches par XPS ont révélé des inhomogénéités de composition qui peuvent expliquer que le κ mesuré soit inférieur aux valeurs de LaAlO3 cristallin (20-25). Bien que les interfaces LAO/Si soient abruptes après le dépôt et que LaAlO3 soit thermodynamiquement stable vis-à-vis du silicium, le système LAO amorphe /Si s’est révélé instable pour des recuits post-dépôt effectués à des températures supérieures à 700°C. Un procédé de fabrication de MOSFETs aux dimensions relâchées a été défini pour tester les filières high-κ. Les premières étapes du procédé ont été validées pour LaAlO3. / Since MOS Field Effect Transistor invention in the 60's, the exploitation of this elementary piece of technology allowed an exponential evolution in the microelectronic field, with a frantic race towards miniaturization of CMOS electronic devices. In this context, the introduction of "high-κ" oxides (notably HfO2) allowed to cross the sub-nanometer barrier of EOT (Equivalent Oxide Thickness) for the gate oxide. Current work are notably related to "high-κ" research materials and processes that would allow an abrupt and thermodynamically stable interface with respect to silicon, that may lead to EOTs of about 5Å. The purpose of this thesis was to explore the potential of amorphous oxide LaAlO3 deposited on silicon by techniques of molecular beam epitaxy, combining studies of the physicochemical and electrical properties of this system. The thesis work has first consisted in defining procedures for the preparation of very thin (≈ 4 nm), robust and reproducible layers on Si in order to allow reliable electrical measurements then to optimize the electrical quality of the hetero-structures by adjusting deposition parameters from correlations between electrical results and physicochemical properties (density, stoichiometry, chemical environment...) and finally to validate a method for integrating the material in the realization of MOSFET. The stability and reproducibility of the measurements were achieved thanks to an adapted surface preparation of the substrate and by the introduction of atomic oxygen during the LaAlO3 deposition, thus allowing homogenization of layers and reducing leakage currents. After optimizing the deposition parameters, the best structures exhibit EOTs of 8-9 A, a dielectric constant of 16 and leakage currents in the range of 10-2 A/cm². Accurate physico-chemical characterizations of thin layers by XPS revealed composition inhomogeneities that can explain why the measured κ is less than values of crystalline LaAlO3 (20-25). Although the LAO/Si interfaces are steep after deposition and LaAlO3 is thermodynamically stable with respect to the silicon, amorphous system LAO/Si has proven unstable during post-deposition annealing carried out at temperatures above 700 ° C. A process for producing MOSFETs with released dimensions was defined to test high-κ field. The first stages of the process have been validated for LaAlO3.