Foram estudados filmes de oxinitreto de silício obtidos por PECVD à 320°C, a partir da mistura gasosa de N2O+SiH4+He, com diferentes valores de pressão e potência de deposição com o objetivo de produzir boa qualidade de interface deste material com o Si e de obter uma baixa densidade de carga efetiva visando a aplicação desses filmes em dispositivos semicondutores MOS. Os resultados mostraram que com uma pressão de deposição de 0,160 mbar e potências menores que 125 W/cm2 é possível obter um valor de densidade de estados de interface (Dit) de 4x1010 eV-1.cm-2, campo elétrico de ruptura (Ebd) de 13 MV/cm, valores comparáveis ao SiO2 térmico e uma densidade de carga efetiva (Nss) de 4x1011 cm-2. Segundo resultados experimentais esse valor de Nss é o mínimo possível que se pode atingir com a limpeza química utilizada em nosso laboratório. Pode-se dizer que estes são resultados bastante interessantes considerando que se trata de um material obtido por PECVD à baixa temperatura, porém viável para aplicação em dispositivos MOS. Iniciando os estudos com dielétricos de maiores valores de constante dielétrica optamos por estudar filmes de TiOx (k=40-100), obtidos por sputtering reativo, a partir da mistura gasosa de Ar+O2 e utilizando alvo de Ti. Foram fabricados capacitores MOS com estes filmes e obteve-se valores de constante dielétrica que variaram de 40-160. Porém esses materiais ainda apresentavam valores apreciáveis de corrente de fuga que foram minimizadas em ordens de grandeza quando utilizados dielétricos de dupla camada com SiO2 ou SiOxNy (otimizado neste trabalho) na interface, além de se observar uma melhora significativa da qualidade de interface. Utilizando dupla camada dielétrica com filmes de SiOxNy e SiO2, ainda espessos (³ 1nm) para camada intermediária, obteve-se uma constante dielétrica efetiva em torno de 20. Vale ressaltar que os dois filmes SiOxNy e TiOx, conseqüentemente a dupla camada, foram fabricados a baixas temperaturas. / Silicon oxynitride films obtained by the PECVD technique from N2O+SiH4+He gaseous mixtures, at 320°C, with different deposition pressure and RF power were studied intending to improve the interface quality with Si, decreasing the effective charge density and the interface state density in order to utilize them in MOS semiconductor devices. The results showed that with a deposition pressure of 0.160 mbar and a RF power density lower than 125 W/cm2 it is possible to obtain interface state density (Dit) values of 4x1010 eV-1.cm-2, Electrical Breakdown (Ebd) of 13 MV/cm, comparable with the obtained for thermally grown SiO2 , and an effective charge density (Nss) of 4x1011 cm-2. According with experimental results this Nss value is the minimum attainable with our chemical cleaning process. In this way it can be said that these results are very promising, considering that these materials were obtained by PECVD at low temperatures, but still viable for MOS devices application. In order to initiate studies with high dielectrics constant material, TiOx films (k= 40-180), obtained by reactive sputtering through the Ar+O2 gaseous mixture utilizing a Ti target, were chosen. MOS capacitors with these films were fabricated and dielectric constant values varying from 40 to 160 were obtained. However, until now, these materials have presented appreciable leakage current values, which were, minimize by orders of magnitude with the addition of a thin SiO2 or SiOxNy (optimized in this work) layer at the interface were utilized. This thin layer also resulted in a significant improvement of the interface quality. Utilizing double dielectric layer with SiOxNy or SiO2, still thick (³ 1nm) as intermediate layer a dielectric constant value of 20 was obtained. Its important to mention that the SiOxNy and TiOx films, and consequently the double layer, were deposited at low temperatures.

La miniaturisation des dispositifs élémentaires de la technologie CMOS impose le remplacement de l'oxyde de silicium pour l'élaboration de l'oxyde de grille. Par l'identification des conditions de formation du silicate de baryum au contact direct du substrat de silicium, cette étude a révélé un candidat potentiel. En premier lieu, la réaction entre Ba et SiO2 aboutissant à la formation d'un silicate de baryum a été mise en évidence in-situ par XPS et SR-PES. Dans un second temps, des films de silicate de baryum ont été élaborés par co-déposition de baryum et d'oxygène à une température de 580 °C. Des traitements thermiques sous vide ont montré que le silicate de baryum est stable jusqu'à 900 °C. Des analyses ex-situ par SIMS et MET ont révélé une interface abrupte avec le substrat. Enfin, un dispositif dédié à la réalisation de croissances par MOCVD a été développé. Il a permis de montrer la possibilité de former un silicate de baryum. La réaction est favorisée lorsque le dépôt se déroule à température élevée, sous une pression partielle d'oxygène.

<p>The development and implementation of a metal gate technology (alloy, compound, or silicide) into metal-oxide-semiconductor field effect transistors (MOSFETs) is necessary to extend the life of planar CMOS devices and enable further downscaling. This thesis examines possible metal gate materials for improving the performance of the gate stack and discusses process integration as well as improved electrical and physical measurement methodologies, tested on capacitor structures and transistors. </p><p>By using reactive PVD and gradually increasing the N₂/Ar flow ratio, it was found that the work function (on SiO₂) of the TiN_x and ZrN_x metal systems could be modulated ~0.7 eV from low near nMOS work functions to high pMOS work functions. After high-temperature anneals corresponding to junction activation, both metals systems reached mid-gap work function values. The mechanisms behind the work function changes are explained with XPS data and discussed in terms of metal gradients and Fermi level pinning due to extrinsic interface states.</p><p>A modified scheme for improved Fowler-Nordheim tunnelling is also shown, using degenerately doped silicon substrates. In that case, the work functions of ALD/PVD TaN were accurately determined on both SiO₂ and HfO₂ and benchmarked against IPE (Internal Photoemission) results. KFM (Kelvin Force Microscopy) was also used to physically measure the work functions of PVD TiN and Mo deposited on SiO₂; the results agreed well with <i>C-V</i> and <i>I-V</i> data.</p><p>Finally, an appealing combination of novel materials is demonstrated with ALD TiN/Al₂O₃/HfAlO_x/Al₂O₃/strained-SiGe surface channel pMOS devices. The drive current and transconductance were measured to be 30% higher than the Si reference, clearly demonstrating increased mobility and the absence of polydepletion. Finally, using similarly processed transistors with Al₂O₃ dielectric instead, low-temperature water vapour annealing was shown to improve the device characteristics by reducing the negative charge within the ALD Al₂O₃.</p>

<p>In this dissertation core level electron spectroscopy has been employed to study various aspects of metal oxide films grown under ultra-high vacuum conditions. </p><p>Studies on <i>in situ</i> ion insertion of lithium into thin TiO₂ systems were performed. The electronic and geometric properties are investigated in detail, along with an estimation of charge transfer from Li to Ti. </p><p>A detailed study of chemical vapour deposition of ZrO₂ on Si(100)-(2x1) was performed. ZrO₂ is found to be an insulator, i.e. its electronic levels are decoupled from the substrate and the Zr levels are best referenced to the local vacuum level. The alignment of the valence and conduction band has been determined. </p><p>Combinatorial chemical vapour deposition of TiO₂ and ZrO₂ on Si(100)-(2x1) was realized. A film with graded stoichiometry consisting of pure TiO₂ and ZrO₂ on the opposing ends and mixed composition of both oxides in the middle was obtained. A detailed study of the electronic levels revealed that ZrO₂ remains an insulator in the monolayer regime and that modification of ZrO₂ with a small amount of TiO₂ leads to a more symmetric alignment of the bands relative to Si. </p><p>The influence of a core hole on the O 1s x-ray absorption spectrum in TiO₂ and ZrO₂ is elucidated. Supported by O 1s photoemission measurements and <i>ab initio</i> calculations it is concluded that the static final state picture as well as dynamical threshold effects must be considered in order to determine the location of the conduction band minimum within the XAS framework. </p><p>Finally a Co modified Co:ZnO film was shown to display ferromagnetic properties. It could be evidenced that Co with oxygen as nearest neighbours was responsible for the magnetism and not metallic Co.</p>

Challenges with integrating high-κ gate dielectric,retrograde Si1-xGexchannel and silicided contacts in future CMOStechnologies are investigated experimentally and theoreticallyin this thesis. ρMOSFETs with either Si or strained Si1-xGex surface-channel and different high-κgate dielectric are examined. Si1-xGex ρMOSFETs with an Al2O3/HfAlOx/Al2O3nano-laminate gate dielectric prepared by means ofAtomic Layer Deposition (ALD) exhibit a great-than-30% increasein current drive and peak transconductance compared toreference Si ρMOSFETs with the same gate dielectric. Apoor high-κ/Si interface leading to carrier mobilitydegradation has often been reported in the literature, but thisdoes not seem to be the case for our Si ρMOSFETs whoseeffective mobility coincides with the universal hole mobilitycurve for Si. For the Si1-xGexρMOSFETs, however, a high density ofinterface states giving riseto reduced carrier mobility isobserved. A method to extract the correct mobility in thepresence of high-density traps is presented. Coulomb scatteringfrom the charged traps or trapped charges at the interface isfound to play a dominant role in the observed mobilitydegradation in the Si1-xGexρMOSFETs. Studying contacts with metal silicides constitutes a majorpart of this thesis. With the conventional device fabrication,the Si1-xGexincorporated for channel applications inevitablyextends to the source-drain areas. Measurement and modelingshow that the presence of Ge in the source/drain areaspositively affects the contact resistivity in such a way thatit is decreased by an order of magnitude for the contact of TiWto p-type Si1-xGex/Si when the Ge content is increased from 0 to 30at. %. Modeling and extraction of contact resistivity are firstcarried out for the traditional TiSi2-Si contact but with an emphasis on the influenceof a Nb interlayer for the silicide formation. Atwo-dimensional numerical model is employed to account foreffects due to current crowding. For more advanced contacts toultra-shallow junctions, Ni-based metallization scheme is used.NiSi1-xGex is found to form on selectively grown p-typeSi1-xGexused as low-resistivity source/drain. Since theformed NiSi1-xGex with a specific resistivity of 20 mWcmreplaces a significant fraction of the shallow junction, athree-dimensional numerical model is employed in order to takethe complex interface geometry and morphology into account. Thelowest contact resistivity obtained for our NiSi1-xGex/p-type Si1-xGexcontacts is 5´10-8Ωcm2, which satisfies the requirement for the 45-nmtechnology node in 2010. When the Si1-xGexchannel is incorporated in a MOSFET, it usuallyforms a retrograde channel with an undoped surface region on amoderately doped substrate. Charge sheet models are used tostudy the effects of a Si retrograde channel on surfacepotential, drain current, intrinsic charges and intrinsiccapacitances. Closed-form solutions are found for an abruptretrograde channel and results implicative for circuitdesigners are obtained. The model can be extended to include aSi1-xGexretrograde channel. Although the analytical modeldeveloped in this thesis is one-dimensional for long-channeltransistors with the retrograde channel profile varying alongthe depth of the transistor, it should also be applicable forshort-channel transistors provided that the short channeleffects are perfectly controlled. Key Words:MOSFET, SiGe, high-k dielectric, metal gate,mobility, charge sheet model, retrograde channel structure,intrinsic charge, intrinsic capacitance, contactresistivity.

For an electronic device well-designed interfaces are critical for the performance. Studies of interfaces down to an atomic level are thus highly motivated both from a fundamental and technological point of view. In this thesis, a surface science approach has been employed to study the formation of interfaces in systems relevant for transistor and solar cell applications. Surface science methodology entails ultra high vacuum environment, single crystalline surfaces, submonolayer control of deposited material, surface sensitive spectroscopy and atomic resolution microscopy. The primary experimental method for characterization is electron spectroscopy. This is a family of very powerful experimental techniques capable of giving information on the atomic level. Additionally, studies have been performed using scanning tunnelling microscopy. Combined these two methods can provide an atomic level characterisation of the geometric and electronic properties of the surface. The emphasis of this work is placed on ultra thin TiO2 and ZrO2 films grown on silicon substrates by means of ultra-high vacuum metal-organic chemical vapour deposition. ZrO2 has also been grown on SiC and FeCrAl. Deposition has been performed with different process parameters. The interface region of each film has been characterised. The band alignment, a most important issue with regard to the development of new transistor devices, for the ZrO2/Si(100) system has been explored. Decomposition pathways of the metal organic precursors have been studied in detail. Changing process parameters is shown to alter both the precursor decomposition pathway and the nature of the interface region, thus opening the possibility to tailor the material function. The titanium dioxide films grown in situ have shown to be excellent models of nanostructured electrode materials. In this spirit, interfaces of model systems for the solid-state dye-sensitized solar cell have been studied. Links between device performance and interface structure have been elucidated.

The development and implementation of a metal gate technology (alloy, compound, or silicide) into metal-oxide-semiconductor field effect transistors (MOSFETs) is necessary to extend the life of planar CMOS devices and enable further downscaling. This thesis examines possible metal gate materials for improving the performance of the gate stack and discusses process integration as well as improved electrical and physical measurement methodologies, tested on capacitor structures and transistors. By using reactive PVD and gradually increasing the N2/Ar flow ratio, it was found that the work function (on SiO2) of the TiNx and ZrNx metal systems could be modulated ~0.7 eV from low near nMOS work functions to high pMOS work functions. After high-temperature anneals corresponding to junction activation, both metals systems reached mid-gap work function values. The mechanisms behind the work function changes are explained with XPS data and discussed in terms of metal gradients and Fermi level pinning due to extrinsic interface states. A modified scheme for improved Fowler-Nordheim tunnelling is also shown, using degenerately doped silicon substrates. In that case, the work functions of ALD/PVD TaN were accurately determined on both SiO2 and HfO2 and benchmarked against IPE (Internal Photoemission) results. KFM (Kelvin Force Microscopy) was also used to physically measure the work functions of PVD TiN and Mo deposited on SiO2; the results agreed well with C-V and I-V data. Finally, an appealing combination of novel materials is demonstrated with ALD TiN/Al2O3/HfAlOx/Al2O3/strained-SiGe surface channel pMOS devices. The drive current and transconductance were measured to be 30% higher than the Si reference, clearly demonstrating increased mobility and the absence of polydepletion. Finally, using similarly processed transistors with Al2O3 dielectric instead, low-temperature water vapour annealing was shown to improve the device characteristics by reducing the negative charge within the ALD Al2O3.

In this dissertation core level electron spectroscopy has been employed to study various aspects of metal oxide films grown under ultra-high vacuum conditions. Studies on in situ ion insertion of lithium into thin TiO2 systems were performed. The electronic and geometric properties are investigated in detail, along with an estimation of charge transfer from Li to Ti. A detailed study of chemical vapour deposition of ZrO2 on Si(100)-(2x1) was performed. ZrO2 is found to be an insulator, i.e. its electronic levels are decoupled from the substrate and the Zr levels are best referenced to the local vacuum level. The alignment of the valence and conduction band has been determined. Combinatorial chemical vapour deposition of TiO2 and ZrO2 on Si(100)-(2x1) was realized. A film with graded stoichiometry consisting of pure TiO2 and ZrO2 on the opposing ends and mixed composition of both oxides in the middle was obtained. A detailed study of the electronic levels revealed that ZrO2 remains an insulator in the monolayer regime and that modification of ZrO2 with a small amount of TiO2 leads to a more symmetric alignment of the bands relative to Si. The influence of a core hole on the O 1s x-ray absorption spectrum in TiO2 and ZrO2 is elucidated. Supported by O 1s photoemission measurements and ab initio calculations it is concluded that the static final state picture as well as dynamical threshold effects must be considered in order to determine the location of the conduction band minimum within the XAS framework. Finally a Co modified Co:ZnO film was shown to display ferromagnetic properties. It could be evidenced that Co with oxygen as nearest neighbours was responsible for the magnetism and not metallic Co.

In this study, flash memory cells with high-k dielectric HfO2 as tunnel oxide and group IV (Si, Ge) nanocrystals were fabricated and tested. The device structure was grown by magnetron sputtering deposition method and analyzed by various diagnostic techniques such as X-ray Photoelectron Spectroscopy (XPS) and Raman spectroscopy. The use of HfO2 tunnel oxide dielectric with high permittivity constant was one of the main purposes of this study. The ultimate aim was to investigate the use of Si and Ge nanocrystals together with HfO2 tunnel oxide in the memory elements. Interface structure of the fabricated devices was studied by XPS spectroscopy. A depth profile analysis was performed with XPS. Nanocrystal formations were verified using Raman spectroscopy technique. The final part of the study includes electrical characterization of memory devices fabricated using Si and Ge floating gate. C-V (Capacitance Voltage) and G-V (Conductance-Voltage) measurements and charge storage behaviour based on C-V measurements were performed. For comparison, structure of Si and Ge layers either in thin film or in the nanocrystal form were studied. A comparison of the C-V characteristics of these two structures revealed that the memory device with thin films do not confine charge carriers under the gate electrode as should be expected for a continuous film. On the other hand, the device with nanocrystals exhibited better memory behavior as a result of better confinement in the isolated nanocrystals. Trace amount of oxygen was found to be enough to oxidize Ge nanocrystals as confirmed by the Raman measurements. The charge storage capability is weakened in these samples as a result of Ge oxidation. In general, this work has demonstrated that high-k dielectric HfO2 and group IV nanocrystals can be used in the new generation MOS based memory elements. The operation of the memory elements are highly dependent on the material and device structures, which are determined by the process conditions.

<p>Challenges with integrating high-κ gate dielectric,retrograde Si_1-xGe_xchannel and silicided contacts in future CMOStechnologies are investigated experimentally and theoreticallyin this thesis. ρMOSFETs with either Si or strained Si_1-xGex surface-channel and different high-κgate dielectric are examined. Si_1-xGex ρMOSFETs with an Al₂O₃/HfAlO_x/Al₂O₃nano-laminate gate dielectric prepared by means ofAtomic Layer Deposition (ALD) exhibit a great-than-30% increasein current drive and peak transconductance compared toreference Si ρMOSFETs with the same gate dielectric. Apoor high-κ/Si interface leading to carrier mobilitydegradation has often been reported in the literature, but thisdoes not seem to be the case for our Si ρMOSFETs whoseeffective mobility coincides with the universal hole mobilitycurve for Si. For the Si_1-xGe_xρMOSFETs, however, a high density ofinterface states giving riseto reduced carrier mobility isobserved. A method to extract the correct mobility in thepresence of high-density traps is presented. Coulomb scatteringfrom the charged traps or trapped charges at the interface isfound to play a dominant role in the observed mobilitydegradation in the Si_1-xGe_xρMOSFETs.</p><p>Studying contacts with metal silicides constitutes a majorpart of this thesis. With the conventional device fabrication,the Si_1-xGe_xincorporated for channel applications inevitablyextends to the source-drain areas. Measurement and modelingshow that the presence of Ge in the source/drain areaspositively affects the contact resistivity in such a way thatit is decreased by an order of magnitude for the contact of TiWto p-type Si_1-xGe_x/Si when the Ge content is increased from 0 to 30at. %. Modeling and extraction of contact resistivity are firstcarried out for the traditional TiSi₂-Si contact but with an emphasis on the influenceof a Nb interlayer for the silicide formation. Atwo-dimensional numerical model is employed to account foreffects due to current crowding. For more advanced contacts toultra-shallow junctions, Ni-based metallization scheme is used.NiSi_1-xGex is found to form on selectively grown p-typeSi_1-xGe_xused as low-resistivity source/drain. Since theformed NiSi1-xGex with a specific resistivity of 20 mWcmreplaces a significant fraction of the shallow junction, athree-dimensional numerical model is employed in order to takethe complex interface geometry and morphology into account. Thelowest contact resistivity obtained for our NiSi_1-xGe_x/p-type Si_1-xGe_xcontacts is 5´10^-8Ωcm², which satisfies the requirement for the 45-nmtechnology node in 2010.</p><p>When the Si_1-xGe_xchannel is incorporated in a MOSFET, it usuallyforms a retrograde channel with an undoped surface region on amoderately doped substrate. Charge sheet models are used tostudy the effects of a Si retrograde channel on surfacepotential, drain current, intrinsic charges and intrinsiccapacitances. Closed-form solutions are found for an abruptretrograde channel and results implicative for circuitdesigners are obtained. The model can be extended to include aSi_1-xGe_xretrograde channel. Although the analytical modeldeveloped in this thesis is one-dimensional for long-channeltransistors with the retrograde channel profile varying alongthe depth of the transistor, it should also be applicable forshort-channel transistors provided that the short channeleffects are perfectly controlled.</p><p><b>Key Words:</b>MOSFET, SiGe, high-k dielectric, metal gate,mobility, charge sheet model, retrograde channel structure,intrinsic charge, intrinsic capacitance, contactresistivity.</p>