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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
1

Design of High-performance, Low-power and Memory-efficient EBCOT and MQ Coder for JPEG2000

Chang, Tso-Hsuan 01 September 2003 (has links)
JPEG2000 is an emerging state-of-the-art standard for still image compression. The standard not only offers superior rate-distortion performance, but also provides a wide range of features and functionality compared to JPEG. However, advantages of JPEG2000 come at the expense of computational complexity and memory requirement in bit-plane coding. So the low cost ASIC design for JPEG2000 hardware implementation remains a challenge. Therefore, a dedicated hardware implementation for EBCOT block coder is necessary. In this thesis a high-throughput EBCOT block coder is proposed. There are two main parts in the EBCOT block coder: context modeling and MQ-coder. For context modeling a novel pass-parallel module based on vertical causal mode is proposed. Pass-parallel modeling which reduces the cycles to check the sample to be coded processes three original sequential passes in a single pass and generates one or two context labels every cycle. It is fast and saves 8K bits internal memory. Since context modeling will generate one or two context labels in one cycle, multi-bit MQ-coder which could avoid the buffer between context modeling and MQ-coder overflows is needed. For MQ-coder three approaches which process one or two context labels in one cycle are proposed. Furthermore, we modified the architecture of MQ-coder and proposed two low-power implementation concepts : reduction of memory access and disabling unused block.
2

JOINT SOURCE/CHANNEL CODING FOR TRANSMISSION OF MULTIPLE SOURCES

Wu, Zhenyu, Bilgin, Ali, Marcellin, Michael W. 10 1900 (has links)
ITC/USA 2005 Conference Proceedings / The Forty-First Annual International Telemetering Conference and Technical Exhibition / October 24-27, 2005 / Riviera Hotel & Convention Center, Las Vegas, Nevada / A practical joint source/channel coding algorithm is proposed for the transmission of multiple images and videos to reduce the overall reconstructed source distortion at the receiver within a given total bit rate. It is demonstrated that by joint coding of multiple sources with such an objective, both improved distortion performance as well as reduced quality variation can be achieved at the same time. Experimental results based on multiple images and video sequences justify our conclusion.
3

IMPLEMENTATION OF REAL-TIME AIRBORNE VIDEO TELEMETRY SYSTEM

Nam, Ju-Hun, Choi, Byeong-Doo, Ko, Sung-Jea, Kim, Bok-Ki, Lee, Woon-Moon, Lee, Nam-Sik, Yu, Jea-Taeg 10 1900 (has links)
ITC/USA 2005 Conference Proceedings / The Forty-First Annual International Telemetering Conference and Technical Exhibition / October 24-27, 2005 / Riviera Hotel & Convention Center, Las Vegas, Nevada / In this paper, we present an efficient real-time implementation technique for Motion-JPEG2000 video compression and its reconstruction used for a real-time Airborne Video Telemetry System. we utilize Motion JPEG2000 and 256-channel PCM Encoder was used for source coding in the developed system. Especially, in multiplexing and demultiplexing PCM encoded data, we use the continuous bit-stream format of the PCM encoded data so that any de-commutator can use it directly, after demultiplexing. Experimental results show that our proposed technique is a practical and an efficient DSP solution.
4

SCALABLE LOW COMPLEXITY CODER FOR HIGH RESOLUTION AIRBORNE VIDEO

Lalgudi, Hariharan G., Marcellin, Michael W., Bilgin, Ali, Nadar, Mariappan S. 10 1900 (has links)
ITC/USA 2007 Conference Proceedings / The Forty-Third Annual International Telemetering Conference and Technical Exhibition / October 22-25, 2007 / Riviera Hotel & Convention Center, Las Vegas, Nevada / Real-time transmission of airborne images to a ground station is highly desirable in many telemetering applications. Such transmission is often through an error prone, time varying wireless channel, possibly under jamming conditions. Hence, a fast, efficient, scalable, and error resilient image compression scheme is vital to realize the full potential of airborne reconnaisance. JPEG2000, the current international standard for image compression, offers most of these features. However, the computational complexity of JPEG2000 limits its use in some applications. Thus, we present a scalable low complexity coder (SLCC) that possesses many desirable features of JPEG2000, yet having high throughput.
5

Joint JPEG2000/LDPC Code System Design for Image Telemetry

Jagiello, Kristin, Aydin, Mahmut Zafer, Ng, Wei-Ren 10 1900 (has links)
ITC/USA 2008 Conference Proceedings / The Forty-Fourth Annual International Telemetering Conference and Technical Exhibition / October 27-30, 2008 / Town and Country Resort & Convention Center, San Diego, California / This paper considers the joint selection of the source code rate and channel code rate in an image telemetry system. Specifically considered is the JPEG2000 image coder and an LDPC code family. The goal is to determine the optimum apportioning of bits between the source and channel codes for a given channel signal-to-noise ratio and total bit rate, R(total). Optimality is in the sense of maximum peak image SNR and the tradeoff is between the JPEG2000 bit rate R(source) and the LDPC code rate R(channel). For comparison, results are included for the industry standard rate-1/2, memory-6 convolutional code.
6

Low-Complexity Perceptual JPEG2000 Encoder for Aerial Images

Oh, Han, Kim, Yookyung 10 1900 (has links)
ITC/USA 2011 Conference Proceedings / The Forty-Seventh Annual International Telemetering Conference and Technical Exhibition / October 24-27, 2011 / Bally's Las Vegas, Las Vegas, Nevada / A highly compressed image inevitably has visible compression artifacts. To minimize these artifacts, many compression algorithms exploit the varying sensitivity of the human visual system (HVS) to different frequencies. However, this sensitivity has typically been measured at the near-threshold level where distortion is just noticeable. Thus, it is unclear that the same sensitivity applies at the supra-threshold level where distortion is highly visible. In this paper, we measure the sensitivity of the HVS for several supra-threshold distortion levels based on our JPEG2000 distortion model. Then, a low-complexity JPEG2000 encoder using the measured sensitivity is described. For aerial images, the proposed encoder significantly reduces encoding time while maintaining superior visual quality compared with a conventional JPEG2000 encoder.
7

Enabling Gigabit IP for Embedded Systems

Tsakiris, Nicholas, n.tsakiris@internode.on.net January 2009 (has links)
For any practical implementation of chip design, there needs to be a hardware platform available for the purpose of prototyping and implementation of FPGA-based programs, whether they are written in VHDL or Verilog. Communication between the platform and a computer is a useful feature of many hardware solutions as it allows for the capability of regular data transmission between the two devices. Furthermore, the ability to communicate between the platform and a computer at high-speeds requires a specially constructed interface, one that can be modified by the designer at their choosing. There are a number of commercial packages which provide a hardware platform to perform this task, however there are drawbacks to many of the available options. Some may require special hardware to connect to a computer using proprietary connectors or boards, which increases the cost and reduces the flexibility of any solution. Other options may have limited access to the internal structure of the interface, limiting the ability of the developer to modify the interface to suit their needs. There may be an extra cost to provide the code to the interface, separate from the board, which can also tax design budgets. This dissertation provides a solution in the form of a Gigabit Ethernet connection with a custom IP/network layer written in VHDL to facilitate the connection. With an increasing number of IP-enabled devices available such as IPTV and set top boxes, the ability to link hardware using Ethernet is very useful and so the development of a lean and capable network layer was considered a suitable focus for the project. The overall goal has been to provide an interface which is cheap, open, robust and efficient, retaining the flexibility a developer might require to modify the code to their needs. After covering some basic background information about the project, the dissertation looks at the requirements of the board and interface, as well as the alternative interface solutions which were looked at before deciding on Gigabit Ethernet. The protocols used in Ethernet are then covered, with both an explanation of the structure of each and their relevance to the implementation. The Finite State Machines which control operation of the interface are covered in depth, with an explanation of their inter-connectivity to each other and how they fit in the data-flow between the computer and the board. Error correction and reliability is discussed, as well as any remaining components critical to the operation of the interface. Pipelining, the method of design which provides the speed required for Gigabit Ethernet, is covered along with the extra speed optimisation techniques used in the design such as RAM swinging buffers. Testing and synthesis are covered which ensure the design is as robust as possible, both in simulations and in real-world applications. The final design was implemented on a Xilinx Spartan 3 FPGA (XC3S5000-5FG900C) and capable of a maximum speed of 128.287 MHz, which is more than enough to satisfy the requirements of Gigabit Ethernet under a variety of network conditions. The interface code occupies 1,166 slices of logic on the FPGA (3% of the total amount of logic available), making it sufficiently compact to run large projects on the same chip. The core was tested on physical hardware and performed correctly at real line Gigabit speeds. Configuration of the computer along with the method of connecting to the board and transferring data is mentioned, with explanation of the code run on the computer to make this possible. Finally, the dissertation provides an example application through the use of JPEG2000 image compression/decompression.
8

FPGA IMPLEMENTATION OF A PARALLEL EBCOT TIER-1 ENCODER THAT PRESERVES ENCODING EFFICIENCY

Damecharla, Hima Bindu 05 October 2006 (has links)
No description available.
9

Segmentation spatio-temporelle et indexation vidéo dans le domaine des représentations hiérarchiques

Morand, Claire 25 November 2009 (has links)
L'objectif de cette thèse est de proposer une solution d'indexation ``scalable'' et basée objet de flux vidéos HD compressés avec Motion JPEG2000. Dans ce contexte, d'une part, nous travaillons dans le domaine transformé hiérachique des ondelettes 9/7 de Daubechies et, d'autre part, la représentation ``scalable'' nécessite des méthodes en multirésolution, de basse résolution vers haute résolution. La première partie de ce manuscrit est dédiée à la définition d'une méthode d'extraction automatique des objets en mouvement. Elle repose sur la combinaison d'une estimation du mouvement global robuste et d'une segmentation morphologique couleur à basse résolution. Le résultat est ensuite affiné en suivant l'ordre des données dans le flux scalable. La deuxième partie est consacrée à la définition d'un descripteur sur les objets précédemment extraits, basé sur les histogrammes en multirésolution des coefficients d'ondelettes. Enfin, les performances de la méthode d'indexation proposée sont évaluées dans le contexte de requêtes scalables de recherche de vidéos par le contenu. / This thesis aims at proposing a solution of scalable object-based indexing of HD video flow compressed by MJPEG2000. In this context, on the one hand, we work in the hierarchical transform domain of the 9/7 Daubechies' wavelets and, on the other hand, the scalable representation implies to search for multiscale methods, from low to high resolution. The first part of this manuscript is dedicated to the definition of a method for automatic extraction of objects having their own motion. It is based on a combination of a robust global motion estimation with a morphological color segmentation at low resolution. The obtained result is then refined following the data order of the scalable flow. The second part is the definition of an object descriptor which is based on the multiscale histograms of the wavelet coefficients. Finally, the performances of the proposed method are evaluated in the context of scalable content-based queries.
10

LDPC-BASED ITERATIVE JOINT SOURCE/CHANNEL DECODING SCHEME FOR JPEG2000

Pu, Lingling, Wu, Zhenyu, Bilgin, Ali, Marcellin, Michael W., Vasic, Bane 10 1900 (has links)
International Telemetering Conference Proceedings / October 18-21, 2004 / Town & Country Resort, San Diego, California / This paper presents a joint source-channel decoding scheme based on a JPEG2000 source coder and an LDPC channel coder. At the encoder, JPEG2000 is used to perform source coding with certain error resilience (ER) modes, and LDPC codes are used to perform channel coding. At the decoder, after one iteration of LDPC decoding, the output codestream is then decoded by JPEG2000. With the error resilience mode switches on, the source decoder detects the position of the first error within each codeblock of the JPEG2000 codestream. This information is fed back to the channel decoder, and incorporated into the calculation of likelihood values of variable nodes for the next iteration of LDPC decoding. Our results indicate that the proposed method has significant gains over conventional separate channel and source decoding.

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