Doctor of Philosophy / Department of Electrical and Computer Engineering / Ruth Douglas Miller / This dissertation presents the design of a novel multi-level inverter with FACTS capability for small to mid-size (10–20kW) permanent-magnet wind installations using modular multi-level converter (MMC) topology. The aim of the work is to design a new type of inverter with D-STATCOM option to provide utilities with more control on active and reactive power transfer of distribution lines. The inverter is placed between the renewable energy source, specifically a wind turbine, and the distribution grid in order to fix the power factor of the grid at a target value, regardless of wind speed, by regulating active and reactive power required by the grid. The inverter is capable of controlling active and reactive power by controlling the phase angle and modulation index, respectively. The unique contribution of the proposed work is to combine the two concepts of inverter and D-STATCOM using a novel voltage source converter (VSC) multi-level topology in a single unit without additional cost. Simulations of the proposed inverter, with 5 and 11 levels, have been conducted in MATLAB/Simulink for two systems including 20 kW/kVAR and 250 W/VAR. To validate the simulation results, a scaled version (250 kW/kVAR) of the proposed inverter with 5 and 11 levels has been built and tested in the laboratory. Experimental results show that the reduced-scale 5- and 11-level inverter is able to fix PF of the grid as well as being compatible with IEEE standards. Furthermore, total cost of the prototype models, which is one of the major objectives of this research, is comparable with market prices.

The automobile industry is moving fast towards Electric Vehicles (EV); however this paradigm shift is currently making its smooth transition through the phase of Hybrid Electric Vehicles. There is an ever-growing need for integration of hybrid energy sources especially for vehicular applications. Different energy sources such as batteries, ultra-capacitors, fuel cells etc. are available. Usage of these varied energy sources alone or together in different combinations in automobiles requires advanced power electronic circuits and control methodologies. An exhaustive literature survey has been carried out to study the power electronic converter, switching modulation strategy to be employed and the particular machine to be used in an EV. Adequate amount of effort has been put into designing the vehicle specifications. Owing to stronger demand for higher performance and torque response in an EV, the Permanent Magnet Synchronous Machine has been favored over the traditional Induction Machine. The aim of this thesis is to demonstrate the use of a multi level inverter fed Brush Less Direct Current (BLDC) motor in a field oriented control fashion in an EV and make it follow a given drive cycle. The switching operation and control of a multi level inverter for specific power level and desired performance characteristics is investigated. The EV has been designed from scratch taking into consideration the various factors such as mass, coefficients of aerodynamic drag and air friction, tire radius etc. The design parameters are meant to meet the requirements of a commercial car. The various advantages of a multi level inverter fed PMSM have been demonstrated and an exhaustive performance evaluation has been done. The investigation is done by testing the designed system on a standard drive cycle, New York urban driving cycle. This highly transient driving cycle is particularly used because it provides rapidly changing acceleration and deceleration curves. Furthermore, the evaluation of the system under fault conditions is also done. It is demonstrated that the system is stable and has a ride-through capability under different fault conditions. The simulations have been carried out in MATLAB and Simulink, while some preliminary studies involving switching losses of the converter were done in PSIM.

The increasing shift towards more electric or all electric aircraft urgently necessitates dc/ac converter systems with high power density. Silicon Carbide (SiC) devices, known for their superior performance over traditional silicon-based devices, facilitate this increase in power density. Nonetheless, achieving optimal power density faces challenges due to the unique requirements and conditions of aircraft applications. A primary obstacle is optimizing the topology and parameters of the dc/ac converter system to achieve high power density while adhering to the stringent aerospace EMI standard DO-160 and bearing current limitations. Electric aircraft demand unmatched reliability, necessitating strict control over EMI noise and bearing currents. These considerations significantly impact the selection of topology and parameters to maximize power density. This dissertation assesses how dc voltage, topology, and switching frequency affect component weight, seeking an optimal mix to enhance power density. The methodology and conclusions are validated through a 200-kW motor drive system designed for electric aircraft. Moreover, traditional dc/ac systems are burdened by the weight and space occupied by separate current sensors and short-circuit protection circuits. This work introduces two innovative current sensors that integrate device current sampling with the functionality of traditional shunt resistors, AC hall sensors, and short-circuit protection circuits, thus improving system density and bandwidth. The first sensor, a PCB-based Rogowski coil, integrates with the gate driver and commutation loops, enhancing power density despite challenges in managing CM noise. The second sensor utilizes parasitic inductance in the power loop, with an integrator circuit and an adaptive compensation algorithm correcting errors from parasitic resistance, ensuring high bandwidth accuracy without needing parasitic resistance information. Variable operation conditions from motors pose another challenge, potentially leading to oversized inverters due to uneven loss distribution among switching devices, exacerbated at extreme operating points like motor start-up. This dissertation investigates the loss distribution in multi-level T-Type neutral point clamped (NPC) topology and proposes a novel loss-balance modulation scheme. This scheme ensures even loss distribution across switches, independent of power factor and modulation index, and is applicable to T-type inverters of any level count. Finally, thermal management and insulation at high altitudes present significant challenges. While power devices may be cooled using conventional liquid cooling solutions, components like AC and EMI filters struggle with complex geometries that can create hot spots or high E-field points, complicating filter design for high current applications. A comprehensive design and optimization methodology based on planar heavy-copper PCB design is proposed. By utilizing flexible 2D or 3D E-field shaping and maximizing thermal transfer from copper to ambient, this methodology significantly improves power density and ensures effective heat dissipation and insulation at altitudes up to 50,000 feet. / Doctor of Philosophy / The increasing shift towards more electric or all electric aircraft urgently necessitates dc/ac converter systems with high power density. Silicon Carbide (SiC) devices, known for their superior performance over traditional silicon-based devices, facilitate this increase in power density. Nonetheless, achieving optimal power density faces challenges due to the unique requirements and conditions of aircraft applications. A primary obstacle is optimizing the topology and parameters of the dc/ac converter system to achieve high power density while adhering to the stringent aerospace EMI standard DO-160 and bearing current limitations. Electric aircraft demand unmatched reliability, necessitating strict control over EMI noise and bearing currents. These considerations significantly impact the selection of topology and parameters to maximize power density. This dissertation assesses how dc voltage, topology, and switching frequency affect component weight, seeking an optimal mix to enhance power density. The methodology and conclusions are validated through a 200-kW motor drive system designed for electric aircraft. Moreover, traditional dc/ac systems are burdened by the weight and space occupied by separate current sensors and short-circuit protection circuits. This work introduces two innovative current sensors that integrate device current sampling with the functionality of traditional shunt resistors, AC hall sensors, and short-circuit protection circuits, thus improving system density and bandwidth. The first sensor, a PCB-based Rogowski coil, integrates with the gate driver and commutation loops, enhancing power density despite challenges in managing CM noise. The second sensor utilizes parasitic inductance in the power loop, with an integrator circuit and an adaptive compensation algorithm correcting errors from parasitic resistance, ensuring high bandwidth accuracy without needing parasitic resistance information. Variable operation conditions from motors pose another challenge, potentially leading to oversized inverters due to uneven loss distribution among switching devices, exacerbated at extreme operating points like motor start-up. This dissertation investigates the loss distribution in multi-level T-Type neutral point clamped (NPC) topology and proposes a novel loss-balance modulation scheme. This scheme ensures even loss distribution across switches, independent of power factor and modulation index, and is applicable to T-type inverters of any level count. Finally, thermal management and insulation at high altitudes present significant challenges. While power devices may be cooled using conventional liquid cooling solutions, components like AC and EMI filters struggle with complex geometries that can create hot spots or high E-field points, complicating filter design for high current applications. A comprehensive design and optimization methodology based on planar heavy-copper PCB design is proposed. By utilizing flexible 2D or 3D E-field shaping and maximizing thermal transfer from copper to ambient, this methodology significantly improves power density and ensures effective heat dissipation and insulation at altitudes up to 50,000 feet.

Ces travaux de thèse consistent à proposer des outils matériels et logiciels pour estimer et améliorer le rendement énergétique de la chaine de conversion d’énergie photovoltaïque pour les applications de l’habitat. Nous avons dans un premier temps proposé une nouvelle architecture mixte d’onduleur à 5 niveaux. Ce type de structure, fondé sur un couplage d’un onduleur en pont complet et d’une architecture NPC, permet de diminuer le THD de la tension de sortie du convertisseur tout en limitant les niveaux de courant de fuite induits par les modules photovoltaïques. Ce type d’architecture est constitué d’un nombre limité de dispositifs à semi-conducteurs par rapport à une structure NPC et permet d’améliorer la robustesse de l’onduleur. Ces premiers résultats de test à puissances réduite permettent de valider le concept proposé. On s’intéresse ensuite à l’étude des paramètres environnant du système pouvant impacter la production d’énergie. Il est mis en évidence l’influence de la variation du coefficient d’échange convectif avec la vitesse du vent. Pour cela, un outil flexible d’estimation de production a été développé. Il est alors possible de quantifier et de qualifier l’impact des conditions météorologiques sur la production d’énergie photovoltaïque. / This study deals with the development of hardware and software tools to estimate and improve the efficiency of the PV energy conversion chain for household photovoltaic applications. We firstly proposed a new mixed 5-level inverter. This type of structure, based on the mixture of a full bridge inverter and NPC architecture, reduces the converter output voltage THD while reducing levels of leakage current induced by the PV modules. This architecture consists of a limited number of semiconductor devices with respect to a NPC structure and improves the robustness of the inverter. Several test results in reduced power validate the concept proposed. Finally, we focus on some parameters that could perturb the system and impact the energy production. It is highlighted that the impact of the convective heat transfer coefficient variation with wind speed is important. For this purpose, a flexible tool was developed to estimate the PV production. It is then possible to quantify and qualify the impact of wind speed on the photovoltaic energy production.

This report is about control, design and implementation of a low voltage-fed quasi Z-source three-level inverter. The topology has been interesting for photovoltaic-systems due to its ability to boost the incoming voltage without needing an extra switching control. The topology was first simulated in Simulink and later implemented on a full-bridge module to measure the harmonic distortion and estimating the power losses of the inverter. An appropriate control scheme was used to set up a shootthrough and design a three-level inverter. The conclusion for the report is that the quasi Z-source inverter could boost the DC-link voltage in the simulation. But there should be more consideration to the internal resistance of the components for the implementation stage as it gave out a lower output voltage than expected.

Multilevel inverter technology has emerged recently as a very important alternative in the area of high-power medium-voltage energy control. Voltage operation above semiconductor device limits, lower common mode voltages, near sinusoidal outputs together with small dv/dt’s, are some of the characteristics that have made this power converters popular for industry and modern research. However, the existing solutions suffer from some inherent drawbacks like common mode voltage problem, DC-link capacitor voltage fluctuation etc. Cascaded multi-level inverter with open-end winding induction motor structure promises significant improvements for high power medium-voltage applications. This dissertation investigates such cascaded multi-level inverters for open-end winding induction motor drive with reduced switch count. Similar to the conventional two-level inverters, other multi-level inverters with PWM control generate alternating common mode voltage (CMV). The alternating common mode voltage coupled through the parasitic capacitors in the machine and results in excessive bearing current and shaft voltage. The unwanted shaft voltage may cross the limit of insulation breakdown voltage and cause motor failure. This alternating common mode voltage adds to the total leakage current through ground conductor and acts as a source of conducted EMI which can interfere with other electronic equipments around. As the number of level increase in the inverter, different voltage levels are made available by using DC-link capacitor banks, instead of using different isolated power supplies. The intermediate-circuit capacitor voltages which are not directly supplied by the power sources are inherently unstable and require a suitable control method for converter operation, preferably without influence on the load power factor. Apart from normal operation, the sudden fault conditions may occur in the system and it is necessary to implement the control strategy considering this condition also. A five-level inverter topology with cascaded power circuit structure is proposed in this dissertation with the strategy to eliminate the common mode voltage and also to maintain the balance in the DC-link capacitor voltages. The proposed scheme is based on a dual five-level inverter for open-end winding induction motor. The principle achievement of this work is the reduction of power circuit complexity in the five-level inverter compared to a previously proposed five-level inverter structure for open-end winding IM drive with common mode voltage elimination. The reduction in the number of power switching devices is achieved by sharing the two two-level inverters for both the inverter structures. The resultant inverter structure can produce a nine-level voltage vector structure with the presence of alternating common mode voltage. The inverter structure is formed by cascading conventional two-level inverters together with NPC three-level inverters. Thus it offers modular and simpler power bus structure. As the power circuit is realised by cascading conventional two-level and NPC three-level inverters the number of power diodes requirements also reduced compared to the conventional NPC five-level inverters. The present proposed structure is implemented for the open-end winding induction motor and the power circuit offers more number of switching state redundancies compared to any conventional five-level inverter. The inverter structure required half the DC-link voltage compared to the DC-link voltage required for the conventional five-level inverter structure for induction motor drive and this reduces the voltage stress on the individual power devices. The common mode voltage is eliminated by selecting only the switching states which do not generate any common mode voltage in pole voltages hence there will be no common mode voltage at the motor phase also. The technique of using the switching state selection for the common mode voltage elimination, cancels out the requirement of the filter for the same purpose. As the inverter output is achieved without the presence of common mode voltage, the dual inverter can be fed from the common DC-link sources, without generating any zero sequence current. Hence the proposed dual five-level inverter structure requires only four isolated DC supplies. The multi-level inverters supplied by single power supply, have inherent unbalance in the DC-link capacitor voltages. This unbalance in the DC-link capacitor voltages causes lower order harmonics at the inverter output, resulting in torque pulsation and increased voltage stress on the power switching devices. A five-level inverter with reduced power circuit complexity is proposed to achieve the dual task of eliminating common mode voltage and DC-link capacitor voltage balancing. The method includes the analysis of current through the DC-link capacitors, depending on the switching state selections. The conditions to maintain all the four DC-link capacitor voltages are analysed. In an ideal condition when there is no fault in the power circuit the balance in the capacitor voltages can be maintained by selecting switching states in consecutive intervals, which have opposite effect on the capacitor voltages. This is called the open loop control of DC-link capacitor voltage balancing, since the capacitor voltages are not sensed during the selection of the switching states. The switching states with zero common mode voltages are selected for the purpose of keeping the capacitor voltages in balanced condition during no fault condition. The use of any extra hardware is avoided. The proposed open loop control of DC-link capacitor voltage balancing is capable of keeping the DC-link capacitor voltages equal in the entire modulation region irrespective of the load powerfactor. The problem with the proposed open loop control strategy is that, it can not take any corrective action if there is any initial unbalance in the capacitor voltages or if any unbalance occurs in the capacitor voltages during operation of the circuit,. To get the corrective action in the capacitor voltages due occurrence of any fault in the circuit, the strategy is further improved and a closed loop control strategy for the DC-link capacitor voltages is established. All the possible fault conditions in the four capacitors are identified and the available switching states are effectively used for the corrective action in each fault condition. The strategy is implemented such a way that the voltage balancing can be achieved without affecting the output fundamental voltage. The proposed five-level inverter structure presented in this thesis is based on a previous work, where a five-level inverter structure is proposed for the open-end winding induction motor. In that previous work 48 switches are used for the realization of the power circuit. It is observed that all the available switching states in this previous work are not used for any of the performance requirement of CMV elimination or DC-link voltage balancing. So, in this proposed work, the power circuit is optimized by reducing some of the switches, keeping the performance of the inverter same as the power circuit proposed in the previous work. The five-level inverter proposed in this thesis used 36 switches and the number of switching states is also reduced. But, the available switching states are sufficient for the CMV elimination and DC-link capacitor voltage balancing. The advantage of the modular circuit structure of this proposed five-level inverter is further investigated and the inverter structure is modified to a seven-level inverter structure for the open end winding induction motor. The proposed power circuit of the seven-level inverter uses only 48 switches, which is less compared to any seven-level inverter structure for the open end winding induction motor with common mode voltage elimination. The power circuit is reduced by sharing four two-level inverters to both the individual seven-level inverters in both the sides of the of the open end winding induction motor. The cascaded structure eliminates the necessity of the power diodes as required by the conventional NPC multilevel inverters. The proposed seven-level inverter is capable of producing a thirteen-level voltage vector hexagonal structure with the presence of common mode voltage. The common mode voltage elimination is achieved by selecting only the switching states with zero common mode voltage from both the inverters and the combined inverter structure produce a seven-level voltage vector structure with zero common mode voltage. The switching frequency is also reduced for the seven-level inverter compared to the proposed five-level inverter. The advantage of this kind of power circuit structure is that the number of power diode requirement is same in both five-level and seven-level inverters. Since there is no common mode voltage in the output voltages, the dual seven-level inverter structure can be implemented with the common DC-link voltage sources for both the sides. Six isolated power supplies are sufficient for both the seven-level inverters. The available switching states in this proposed seven-level inverter are further analysed to implement the open loop and closed loop capacitor voltage balancing and this allow the power circuit to run with only three isolated DC supplies. All the proposed work presented in this thesis are initially simulated in SIMULINK toolbox and then implemented in a form of laboratory prototype. A 2.5KW open end winding induction motor is used for the implementation of these proposed works. But all these work general in nature and can be implemented for high power drive applications with proper device ratings.