• Refine Query
  • Source
  • Publication year
  • to
  • Language
  • 114
  • 28
  • 19
  • 8
  • 4
  • 3
  • 2
  • 2
  • 2
  • 2
  • 1
  • 1
  • Tagged with
  • 247
  • 68
  • 50
  • 49
  • 40
  • 38
  • 33
  • 31
  • 23
  • 22
  • 19
  • 19
  • 18
  • 17
  • 17
  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
41

Compactação de vídeo escalável / Scalable Compression

Soler, Luciano January 2006 (has links)
A codificação de vídeo é um problema cuja solução deve ser projetada de acordo com as necessidades da aplicação desejada. Neste trabalho, um método de compressão de vídeo com escalabilidade é apresentado, apresentando melhorias dos formatos de compressão atuais. A escalabilidade corresponde a capacidade de extrair do bitstream completo, conjuntos eficientes de bits que são decodificados oferecendo imagens ou vídeos decodificados com uma variação (escala) segundo uma dada característica da imagem ou vídeo. O número de conjuntos que podem ser extraídos do bitstream completo definem a granularidade da escalabilidade fornecida, que pode ser muito fina ou com passos grossos. Muitas das técnicas de codificação escalável utilizam uma camada base que deve ser sempre decodificada e uma ou mais camadas superiores que permitem uma melhoria em termos de qualidade (SNR), resolução espacial e/ou resolução temporal. O esquema de codificação escalável final presente na norma MPEG-4 é uma das técnicas mais promissoras, pois pode adaptar-se às características dos canais (Internet) ou terminais que apresentam um comportamento variável ou desconhecido, como velocidade maxima de acesso, variações de largura de banda, erros de canal, etc. Apesar da norma MPEG-4 FGS se afirmar como uma alternativa viável para aplicações de distribuição de vídeo, possui uma quebra significativa de desempenho em comparação com a codificação não escalável de vídeo (perfil ASP da norma MPEG-4 Visual). Este trabalho tem por objetivo estudar novas ferramentas de codificação de vídeo introduzidas na recente norma H.264/AVC e MPEG-4 Visual, desenvolvendo um modelo que integre a escalabilidade granular presente no MPEG-4 aos avanços na área de codificação presentes no H.264/AVC. Esta estrutura de escalabilidade permite reduzir o custo em termos de eficiência da codificação escalável. Os resultados apresentados dentro de cada capítulo mostram a eficácia do método proposto bem como idéias para melhorias em trabalhos futuros. / Video encoding is a problem whose solution should be designed according to the need of intended application. This work presents a method of video compression with scalability that improves the current compression formats. Scalability represents the extracting capacity of full bitstream, efficient set of bits that are decoded to supply images or decoded videos with a variation according to a given image or video feature. A number of sets that can be extracted from full bitstream defines the supplied scalability granularity, which can be very thin or with thick steps. Most scalable video coding techniques use a base layer which must always be decoded and one or more higher layers which allow improvements in terms of quality (also known as SNR), frame/sampling rate or spatial resolution (for images and video). The MPEG-4 Fine Granularity Scalable (FGS) video coding scheme is one of the most promising techniques, because it can adapt itself to the features of channels (Internet) or terminals that present an unpredictable or unknown behavior, as maximum speed of access, variations of the bandwidth, channel errors, etc. Although the MPEG-4 FGS standard is a feasible solution for video streaming applications, it shows a significant loss of performance in comparison with non-scalable video coding, in particular the rather efficient Advanced Simple Profile defined in MPEG-4 Visual Standard. This work aims at studying new tools of video encoding introduced by the recent H.264/AVC norm and Visual MPEG-4, developing a model that integrates the granular scalability present in MPEG-4 to the coding improvements present in H.264/AVC. This new scalability structure allows cost reduction in terms of efficiency of the scalable coding. The results presented in each chapter show the effectiveness of the proposed method as well as ideas for improvements in future work.
42

SYNTHESIS AND TESTING OF THRESHOLD LOGIC CIRCUITS

PALANISWAMY, ASHOK KUMAR 01 December 2014 (has links)
Threshold logic gates gaining more importance in recent years due to the significant development in the switching devices. This renewed the interest in synthesis and testing of circuits with threshold logic gates. Two important synthesis considerations of threshold logic circuits are addressed namely, threshold logic function identification and reducing the total number of threshold logic gates required to represent the given boolean circuit description. A fast method to identify the given Boolean function as a threshold logic function with weight assignment is introduced. It characterizes the threshold logic function based on the modified chows parameters which results in drastic reduction in time and complexity. Experiment results shown that the proposed method is at least 10 times faster for each input and around 20 times faster for 7 and 8 input, when comparing with the algorithmic based methods. Similarly, it is 100 times faster for 8 input, when comparing with asummable method. Existing threshold logic synthesis methods decompose the larger input functions into smaller input functions and perform synthesis for them. This results in increase in the number of threshold logic gates required to represent the given circuit description. The proposed implicit synthesis methods increase the size of the functions that can be handled by the synthesis algorithm, thus the number of threshold logic gates required to implement very large input function decreases. Experiment results shown that the reduction in the TLG count is 24% in the best case and 18% on average. An automatic test pattern generation approach for transition faults on a circuit consisting of current mode threshold logic gates is introduced. The generated pattern for each fault excites the maximum propagation delay at the gate (the fault site). This is a high quality ATPG. Since current mode threshold logic gate circuits are pipelined and the combinational depth at each pipeline stage is practically one. It is experimentally shown that the fault coverage for all benchmark circuits is approximately 97%. It is also shown that the proposed method is time efficient.
43

Compactação de vídeo escalável / Scalable Compression

Soler, Luciano January 2006 (has links)
A codificação de vídeo é um problema cuja solução deve ser projetada de acordo com as necessidades da aplicação desejada. Neste trabalho, um método de compressão de vídeo com escalabilidade é apresentado, apresentando melhorias dos formatos de compressão atuais. A escalabilidade corresponde a capacidade de extrair do bitstream completo, conjuntos eficientes de bits que são decodificados oferecendo imagens ou vídeos decodificados com uma variação (escala) segundo uma dada característica da imagem ou vídeo. O número de conjuntos que podem ser extraídos do bitstream completo definem a granularidade da escalabilidade fornecida, que pode ser muito fina ou com passos grossos. Muitas das técnicas de codificação escalável utilizam uma camada base que deve ser sempre decodificada e uma ou mais camadas superiores que permitem uma melhoria em termos de qualidade (SNR), resolução espacial e/ou resolução temporal. O esquema de codificação escalável final presente na norma MPEG-4 é uma das técnicas mais promissoras, pois pode adaptar-se às características dos canais (Internet) ou terminais que apresentam um comportamento variável ou desconhecido, como velocidade maxima de acesso, variações de largura de banda, erros de canal, etc. Apesar da norma MPEG-4 FGS se afirmar como uma alternativa viável para aplicações de distribuição de vídeo, possui uma quebra significativa de desempenho em comparação com a codificação não escalável de vídeo (perfil ASP da norma MPEG-4 Visual). Este trabalho tem por objetivo estudar novas ferramentas de codificação de vídeo introduzidas na recente norma H.264/AVC e MPEG-4 Visual, desenvolvendo um modelo que integre a escalabilidade granular presente no MPEG-4 aos avanços na área de codificação presentes no H.264/AVC. Esta estrutura de escalabilidade permite reduzir o custo em termos de eficiência da codificação escalável. Os resultados apresentados dentro de cada capítulo mostram a eficácia do método proposto bem como idéias para melhorias em trabalhos futuros. / Video encoding is a problem whose solution should be designed according to the need of intended application. This work presents a method of video compression with scalability that improves the current compression formats. Scalability represents the extracting capacity of full bitstream, efficient set of bits that are decoded to supply images or decoded videos with a variation according to a given image or video feature. A number of sets that can be extracted from full bitstream defines the supplied scalability granularity, which can be very thin or with thick steps. Most scalable video coding techniques use a base layer which must always be decoded and one or more higher layers which allow improvements in terms of quality (also known as SNR), frame/sampling rate or spatial resolution (for images and video). The MPEG-4 Fine Granularity Scalable (FGS) video coding scheme is one of the most promising techniques, because it can adapt itself to the features of channels (Internet) or terminals that present an unpredictable or unknown behavior, as maximum speed of access, variations of the bandwidth, channel errors, etc. Although the MPEG-4 FGS standard is a feasible solution for video streaming applications, it shows a significant loss of performance in comparison with non-scalable video coding, in particular the rather efficient Advanced Simple Profile defined in MPEG-4 Visual Standard. This work aims at studying new tools of video encoding introduced by the recent H.264/AVC norm and Visual MPEG-4, developing a model that integrates the granular scalability present in MPEG-4 to the coding improvements present in H.264/AVC. This new scalability structure allows cost reduction in terms of efficiency of the scalable coding. The results presented in each chapter show the effectiveness of the proposed method as well as ideas for improvements in future work.
44

Compactação de vídeo escalável / Scalable Compression

Soler, Luciano January 2006 (has links)
A codificação de vídeo é um problema cuja solução deve ser projetada de acordo com as necessidades da aplicação desejada. Neste trabalho, um método de compressão de vídeo com escalabilidade é apresentado, apresentando melhorias dos formatos de compressão atuais. A escalabilidade corresponde a capacidade de extrair do bitstream completo, conjuntos eficientes de bits que são decodificados oferecendo imagens ou vídeos decodificados com uma variação (escala) segundo uma dada característica da imagem ou vídeo. O número de conjuntos que podem ser extraídos do bitstream completo definem a granularidade da escalabilidade fornecida, que pode ser muito fina ou com passos grossos. Muitas das técnicas de codificação escalável utilizam uma camada base que deve ser sempre decodificada e uma ou mais camadas superiores que permitem uma melhoria em termos de qualidade (SNR), resolução espacial e/ou resolução temporal. O esquema de codificação escalável final presente na norma MPEG-4 é uma das técnicas mais promissoras, pois pode adaptar-se às características dos canais (Internet) ou terminais que apresentam um comportamento variável ou desconhecido, como velocidade maxima de acesso, variações de largura de banda, erros de canal, etc. Apesar da norma MPEG-4 FGS se afirmar como uma alternativa viável para aplicações de distribuição de vídeo, possui uma quebra significativa de desempenho em comparação com a codificação não escalável de vídeo (perfil ASP da norma MPEG-4 Visual). Este trabalho tem por objetivo estudar novas ferramentas de codificação de vídeo introduzidas na recente norma H.264/AVC e MPEG-4 Visual, desenvolvendo um modelo que integre a escalabilidade granular presente no MPEG-4 aos avanços na área de codificação presentes no H.264/AVC. Esta estrutura de escalabilidade permite reduzir o custo em termos de eficiência da codificação escalável. Os resultados apresentados dentro de cada capítulo mostram a eficácia do método proposto bem como idéias para melhorias em trabalhos futuros. / Video encoding is a problem whose solution should be designed according to the need of intended application. This work presents a method of video compression with scalability that improves the current compression formats. Scalability represents the extracting capacity of full bitstream, efficient set of bits that are decoded to supply images or decoded videos with a variation according to a given image or video feature. A number of sets that can be extracted from full bitstream defines the supplied scalability granularity, which can be very thin or with thick steps. Most scalable video coding techniques use a base layer which must always be decoded and one or more higher layers which allow improvements in terms of quality (also known as SNR), frame/sampling rate or spatial resolution (for images and video). The MPEG-4 Fine Granularity Scalable (FGS) video coding scheme is one of the most promising techniques, because it can adapt itself to the features of channels (Internet) or terminals that present an unpredictable or unknown behavior, as maximum speed of access, variations of the bandwidth, channel errors, etc. Although the MPEG-4 FGS standard is a feasible solution for video streaming applications, it shows a significant loss of performance in comparison with non-scalable video coding, in particular the rather efficient Advanced Simple Profile defined in MPEG-4 Visual Standard. This work aims at studying new tools of video encoding introduced by the recent H.264/AVC norm and Visual MPEG-4, developing a model that integrates the granular scalability present in MPEG-4 to the coding improvements present in H.264/AVC. This new scalability structure allows cost reduction in terms of efficiency of the scalable coding. The results presented in each chapter show the effectiveness of the proposed method as well as ideas for improvements in future work.
45

Affordable and Scalable Manufacturing of Wearable Multi-Functional Sensory “Skin” for Internet of Everything Applications

Nassar, Joanna M. 10 1900 (has links)
Demand for wearable electronics is expected to at least triple by 2020, embracing all sorts of Internet of Everything (IoE) applications, such as activity tracking, environmental mapping, and advanced healthcare monitoring, in the purpose of enhancing the quality of life. This entails the wide availability of free-form multifunctional sensory systems (i.e “skin” platforms) that can conform to the variety of uneven surfaces, providing intimate contact and adhesion with the skin, necessary for localized and enhanced sensing capabilities. However, current wearable devices appear to be bulky, rigid and not convenient for continuous wear in everyday life, hindering their implementation into advanced and unexplored applications beyond fitness tracking. Besides, they retail at high price tags which limits their availability to at least half of the World’s population. Hence, form factor (physical flexibility and/or stretchability), cost, and accessibility become the key drivers for further developments. To support this need in affordable and adaptive wearables and drive academic developments in “skin” platforms into practical and functional consumer devices, compatibility and integration into a high performance yet low power system is crucial to sustain the high data rates and large data management driven by IoE. Likewise, scalability becomes essential for batch fabrication and precision. Therefore, I propose to develop three distinct but necessary “skin” platforms using scalable and cost effective manufacturing techniques. My first approach is the fabrication of a CMOS-compatible “silicon skin”, crucial for any truly autonomous and conformal wearable device, where monolithic integration between heterogeneous material-based sensory platform and system components is a challenge yet to be addressed. My second approach displays an even more affordable and accessible “paper skin”, using recyclable and off-the-shelf materials, targeting environmental mapping through 3D stacked arrays, or advanced personalized healthcare through the developed “paper watch” prototype. My last approach targets a harsh environment waterproof “marine skin” tagging system, using marine animals as allies to study the marine ecosystem. The “skin” platforms offer real-time and simultaneous monitoring while preserving high performance and robust behaviors under various bending conditions, maintaining system compatibility using cost-effective and scalable approaches for a tangible realization of a truly flexible wearable device.
46

A toolbox for multi-objective optimisation of low carbon powertrain topologies

Mohan, Ganesh January 2016 (has links)
Stricter regulations and evolving environmental concerns have been exerting ever-increasing pressure on the automotive industry to produce low carbon vehicles that reduce emissions. As a result, increasing numbers of alternative powertrain architectures have been released into the marketplace to address this need. However, with a myriad of possible alternative powertrain configurations, which is the most appropriate type for a given vehicle class and duty cycle? To that end, comparative analyses of powertrain configurations have been widely carried out in literature; though such analyses only considered limited types of powertrain architectures at a time. Collating the results from these literature often produced findings that were discontinuous, which made it difficult for drawing conclusions when comparing multiple types of powertrains. The aim of this research is to propose a novel methodology that can be used by practitioners to improve the methods for comparative analyses of different types of powertrain architectures. Contrary to what has been done so far, the proposed methodology combines an optimisation algorithm with a Modular Powertrain Structure that facilitates the simultaneous approach to optimising multiple types of powertrain architectures. The contribution to science is two-folds; presenting a methodology to simultaneously select a powertrain architecture and optimise its component sizes for a given cost function, and demonstrating the use of multi-objective optimisation for identifying trade-offs between cost functions by powertrain architecture selection. Based on the results, the sizing of the powertrain components were influenced by the power and energy requirements of the drivecycle, whereas the powertrain architecture selection was mainly driven by the autonomy range requirements, vehicle mass constraints, CO2 emissions, and powertrain costs. For multi-objective optimisation, the creation of a 3-dimentional Pareto front showed multiple solution points for the different powertrain architectures, which was inherent from the ability of the methodology to concurrently evaluate those architectures. A diverging trend was observed on this front with the increase in the autonomy range, driven primarily by variation in powertrain cost per kilometre. Additionally, there appeared to be a trade-off in terms of electric powertrain sizing between CO2 emissions and lowest mass. This was more evident at lower autonomy ranges, where the battery efficiency was a deciding factor for CO2 emissions. The results have demonstrated the contribution of the proposed methodology in the area of multi-objective powertrain architecture optimisation, thus addressing the aims of this research.
47

Scalable video coding sobre TCP

Sanhueza Gutiérrez, Andrés Edgardo January 2015 (has links)
Ingeniero Civil Eléctrico / En tiempos modernos la envergadura del contenido multimedia avanza más rápido que el desarrollo de las tecnologías necesarias para su correcta difusión a través de la red. Es por esto que se hacen necesarios nuevos protocolos que sirvan como puente entre ambas entidades para así obtener un máximo de provecho del contenido a pesar de que la tecnología para distribuirlos aún no sea la adecuada. Es así, que dentro de las últimas tecnologías de compresión de video se encuentra Scalable Video Coding (SVC), la cual tiene por objetivo codi car distintas calidades en un único bitstream capaz de mostrar cualquiera de las calidades embebidas en éste según se reciba o no toda la información. En el caso de una conexión del tipo streaming, en donde es necesaria una uidez y delidad en ambos extremos, la tecnología SVC tiene un potencial muy grande respecto de descartar un mínimo de información para privilegiar la uidez de la transmisión. El software utilizado para la creación y manipulación de estos bitstreams SVC es Joint Scalable Video Model (JSVM). En este contexto, se desarrolla el algoritmo de deadline en Matlab, que omite informaci ón del video SVC de acuerdo a qué tan crítico sea el escenario de transmisión. En este escenario se considera la percepción de uidez del usuario como medida clave, por lo cual se prioriza mantener siempre una tasa de 30 fps a costa de una pérdida de calidad mínima. El algoritmo, omite información de acuerdo a qué tan lejos se esté de este deadline de 30 fps, si se está muy lejos, se omite información poco relevante, y si se está muy cerca, información más importante. Los resultados se contrastan con TCP y se evalúan para distintos valores de RTTs, cumpliendo totalmente el objetivo para valores menores a 150 ms que resultan en diferencias de hasta 20 s a favor del algoritmo de deadline al término de la transmisión. Esta mejora en tiempo de arribo no descarta información esencial y sólo degrada ligeramente la calidad del video en pos de mantener la tasa de 30fps. Por el contrario, en escenarios muy adversos de 300 ms en RTT, las omisiones son de gran envergadura y comprometen frames completos, en conjunto con una degradación generalizada del video y la aparición de artefactos en éste. Por tanto la propuesta cumple los objetivos en ambientes no muy adversos. Para toda la simulación se uso un video en movimiento de 352x288 y 150 frames de largo.
48

Programming Support for Scalable, Serializable and Elastic Cloud Applications

Bo Sang (5930225) 30 July 2020 (has links)
<div>Elasticity is an essential feature for cloud applications to handle varying and unpredictable workloads in a cost-effective way on cloud platforms. However, implementing a stateful elastic application is hard, as programmers have to: (1) reason about concurrent execution in the applications (serializability); (2) guarantee the application can process more requests with larger scale (scalability); and (3) provide elasticity management to improve performance and resource efficiency for applications (efficient elasticity management). Unfortunately, addressing all those concerns requires deep understanding and rich experience in distributed systems and cloud computing. </div><div> </div><div>In this dissertation, we provide programming support to help programmers implement their stateful elastic cloud applications in a simpler manner. Specifically, we present AEON, an actor-based programming language, and \arch, an elastic programming framework. On the one hand, AEON provides programmers with scalability and serialzability, executing actor-based programs in a serialized manner while still retaining a high degree of parallelism. Meanwhile, AEON can adjust programs' scale via fine-grained live actor migration. On the other hand, PLASMA includes (1) an elastic programming language as a second ``level'' of programming (complementing the main application programming language) for describing elasticity behaviors, and (2) a novel semantics-aware elasticity management runtime that tracks program execution and acts upon application features as suggested by elasticity behaviors. </div><div>With these, PLASMA can provide efficient elasticity management to cloud applications</div>
49

Parallel Sparse Matrix-Matrix Multiplication: A Scalable Solution With 1D Algorithm

Hoque, Mohammad Asadul, Raju, Md Rezaul Karim, Tymczak, Christopher John, Vrinceanu, Daniel, Chilakamarri, Kiran 01 January 2015 (has links)
This paper presents a novel implementation of parallel sparse matrix-matrix multiplication using distributed memory systems on heterogeneous hardware architecture. The proposed algorithm is expected to be linearly scalable up to several thousands of processors for matrices with dimensions over 106 (million). Our approach of parallelism is based on 1D decomposition and can work for both structured and unstructured sparse matrices. The storage mechanism is based on distributed hash lists, which reduces the latency for accessing and modifying an element of the product matrix, while reducing the overall merging time of the partial results computed by the processors. Theoretically, the time and space complexity of our algorithm is linearly proportional to the total number of non-zero elements in the product matrix C. The results of the performance evaluation show that the algorithm scales much better for sparse matrices with bigger dimensions. The speedup achieved using our algorithm is much better than other existing 1D algorithms. We have been able to achieve about 500 times speedup with only 672 processors. We also identified the impact of hardware architecture on scalability.
50

Fully Distributed Control and Its Analog IC Design For Scalable Multiphase Voltage Regulators

Zhang, Xin 06 December 2005 (has links)
Modern microprocessors require low supply voltage (about 1V), but very high current (maximum current is 300A in servers, 100A in desktop PCs and 70A in notebook PCs), and tighter voltage regulation. However, the size of a CPU Voltage Regulator (VR) needs to be reduced. To achieve much higher power density with decent efficiency in VR design is a major challenge. Moreover, the CPU current rating can vary from 40A to 300A for different kinds of computers, and CPU power supply specifications change quickly even for the same type of computers. Since the maximum power rating of one channel converter is limited, the VR channel number may vary over a large range to meet VR specifications. Traditionally, VR design with different channel numbers needs different types of VR controllers. To reduce the developing cost of different control ICs, and to maximize the market share of one design, scalable phase design based on the same type of IC is a new trend in VR design. To achieve higher power density and at the same time to achieve scalable phase design, the concept of Monolithic Voltage Regulator Channel (MVRC) is introduced in this dissertation. MVRC is a power IC with one channel converter's power MOSFETs, drivers and control circuitries monolithically integrated based on lateral device technology and working at high frequency. It can be used alone to supply a POL (Point of Load). And without the need for a separate master controller, multiple MVRC chips can be paralleled together to supply a higher current load such as a CPU. To make MVRC a reality, the key is to develop a fully distributed control scheme and its associated analog IC circuitry, so that it can provide control functions required by microprocessors and the performance must be equal or better than a traditional a centralized VRM controller. These functions includes: multiphase interleaving, Adaptive Voltage Position (AVP) and current sharing. To achieve interleaving, this dissertation introduces a novel distributed interleaving scheme that can easily achieve scalable phase interleaving without channel number limitation. Each channel's interleaving circuitry can be monolithically integrated without any external components. The proposed scheme is verified by a hardware prototype. The key building block is a self-adjusting saw-tooth generator, which can produce accurate saw-tooth waveforms without trimming. The interleaving circuit for each channel has two self-adjusting saw-tooth generators. One behaves as a Phase Lock Loop to produce accurate phase delay, and the other produces carrier signals. To achieve Adaptive Voltage Position and current sharing, a novel distributed control scheme adopting the active droop control for each channel is introduced. Verified by hardware testing and transient simulations, the proposed distributed AVP and current sharing control scheme meets the requirements of Intel's guidelines for today and future's VR design. Monte Carlo simulation and statistics analysis show that the proposed scheme has a better AVP tolerance band than the traditional centralized control if the same current sensing scheme is used, and its current sharing performance is as good as the traditional control. It is critical for the current sensing to achieve a tight AVP regulation window and good current sharing in both the traditional centralized control scheme and the proposed distributed control scheme. Inductor current sensing is widely adopted because of the acceptable accuracy and no extra power loss. However, the Signal-to-Noise Ratio (SNR) of the traditional inductor current sensing scheme may become too small to be acceptable in high frequency VR design where small inductor with small DCR is often adopted. To improve the SNR, a novel current sensing scheme with an accurate V/I converter is proposed. To reduce the complexity of building an accurate V/I converter with traditional Opamps, an accurate monolithic transconductance (Gm) amplifier with a large dynamic range is developed. The proposed Gm amplifier can achieve accurate V/I conversion without trimming. To obtain further verification, above proposed control schemes are monolithically integrated in a dual channel synchronous BUCK controller using TSMC BiCMOS 0.5um process. Testing results show that all the proposed novel analog circuits work as expected. System testing results show good interleaving, current sharing and AVP performance. The silicon size of each channel is 1800×1000um². With proposed current sensing, interleaving, AVP and current sharing, as well as their associated analog IC implementations, the technical barriers to develop a MVRC are overcome. MVRC has the potential to become a generic power IC solution for today and future POL and CPU power management. The proposed distributed interleaving, AVP and current sharing schemes can also be used in any cellular converter system. The proposed analog building blocks like the self-adjusting saw-tooth generator and the accurate transconductance amplifier can be used as basic building blocks in any DC-DC controller. / Ph. D.

Page generated in 0.0646 seconds