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No description available.

With the fast advance in VLSI technology, smaller, more powerful digital system is available. It requires power supply with higher power density, lower profile and higher efficiency. PWM topologies have been widely used for this application. Unfortunately, hold up time requirement put huge penalties on the performance of these topologies. Also, high switching loss limited the power density achievable for these topologies. Two techniques to deal with hold up time issue are discussed in this dissertation: range winding solution and asymmetric winding solution, the efficiency at normal operation point could be improved with these methods. To reduce secondary rectifier conduction loss, QSW synchronous rectifier is developed, which also helps to achieve ZVS for symmetrical half bridge converter. Although with these methods, the efficiency of front end DC/DC converter could be improved, the excessive switching loss prohibited higher switching frequency. To achieve the targets, topologies with high switching frequency and high efficiency must be developed. Three resonant topologies: SRC, PRC and SPRC, are been investigated for this application because of their fame of low switching loss. Unfortunately, to design with hold up requirement, none of them could provide significant improvements over PWM converter. Although the negative outcome, the desired characteristic for front end application could be derived. Base on the desired characteristic, a thorough search is performed for three elements resonant tanks. LLC resonant topology is found to posses the desired characteristic. From comparison, LLC resonant converter could reduce the total loss by 40% at same switching frequency. With doubled switching frequency, efficiency of LLC resonant converter is still far better than PWM converters. To design the power stage of LLC resonant converter, DC analysis is performed with two methods: simulation and fundamental component simplification. Magnetic design is also discussed. The proposed integrated magnetic structure could achieve smaller volume, higher efficiency and easy manufacture. To make practical use of the topology, over load protection is a critical issue. Three methods to limit the stress under over load situation are discussed. With these methods, the converter could not only survive the over load condition, but also operate for long time under over load condition. Next small signal characteristic of the converter is investigated in order to design the feedback control. For resonant converter, state space average method is no longer valid. Two methods are used to investigate the small signal characteristic of LLC resonant converter: simulation and extended describing function method. Compare with test results, both methods could provide satisfactory results. To achieve both breadth and depth, two methods are both used to reveal the myth. With this information, compensator for feedback control could be designed. Test circuit of LLC resonant converter was developed for front end DC/DC application. With LLC topology, power density of 48W/in3 could be achieved compare with 13W/in3 for PWM converter. / Ph. D.

Accurate small and large-signal models of metal-semiconductor field effect transistor (MESFET) devices are essential in all modern microwave and millimeter wave applications. Those models are used for robust designs and fabrication development. The sophistication of modern communication systems urged the need of monolithic microwave integrated circuits (MMICs), which consists of many MESFETs on the same chip. As the chip density increases, the need of accurate MESFET models becomes more pronounced. In this study, a new technique has been developed to extract a 15-element small signal model of MESFET devices. This technique implies the use of three sets of S-parameter measurements at different bias conditions. The technique consists of two major steps; in the first step, some of the bias-independent extrinsic parameters are estimated in preparation for the second step. In the second step, all other parameters should be extracted at the bias point of interest. This technique shows reliable results. Unlike other optimization techniques, our proposed technique shows insensitivity to the unavoidable measurement errors over any frequency range. It shows a unique solution for all parameter values. This technique has been tested on S-parameters of a hypothetical device model and compared with other optimization-based extraction techniques. Moreover, it has been also applied to GaAsTEK 0.8x300 μm2 MESFETs to extract the model parameters at different bias voltages. The study reveals accurate and consistent results among the similar devices on the same wafer. Some thermal characteristics of the small-signal parameters are discussed. The parameters are extracted from measurements at three temperatures for two similar devices on the same wafer. The thermal results of the two devices demonstrate consistent results, which assure the preciseness, and robustness of our proposed technique. In addition, the relation between the small-signal model parameters and the large signal model parameters is also presented. The parameters of an empirical model for the drain-source current are extracted from the dc measurements along with the small-signal transconductance and output conductance. The large-signal model results for a GaAsTEK 0.8x300 μm2 MESFET are introduced. / Ph. D.

This work presents a modeling methodology that uses new types of models called low-frequency, large-signal models in a circuit simulator (Saber) to model a complex hybrid ac/dc power electronics system. The new achievement in this work is being able to model the different components as circuit-based models and to capture some of the large-signal phenomena, for example, real transient behavior of the system such as startup, inrush current and power flow directionality. In addition, models are capable of predicting most low frequency harmonics only seen in real switching detailed models. Therefore the new models system can be used to predict steady state performance, harmonics, stability and transients. This work discusses the modeling issues faced based on the author recent experiences both on component level and system level. In addition, it recommends proper solutions to these issues verified with simulations. This work also presents one of the new models in detail, a voltage source inverter (VSI), and explains how the model can be modified to capture low frequency harmonics that are usually phenomena modeled only with switching models. The process of implementing these different phenomena is discussed and the model is then validated by comparing the results of the proposed low frequency large signal (LFLS) model to a complete detailed switching model. In addition, experimental results are also obtained with a 2 kW voltage source inverter prototype to validate the proposed improved average model (LFLS model). In addition, a complete Verification, Validation, and Uncertainty Quantification (VV&UQ) procedures is applied to a two-level boost rectifier. The goal of this validation process is the improvement of the modeling procedure for power electronics systems, and the full assessment of the boost rectifier model predictive capabilities. Finally, the performance of the new models system is compared with the detailed switching models system. The LFLS models result in huge cut in simulation time (about 10 times difference) and also the ability to use large time step with the LFLS system and still capture all the information needed. Even though this low frequency large signal (LFLS) models system has wider capabilities than ideal average models system, it still can’t predict all switching phenomena. Therefore, another benefit of this modeling approach is the ability to mix different types of models (low frequency large signal (LFLS) and detailed switching) based on the application study they are used for. / Ph. D.

With development of renewable energies worldwide, power system is seeing higher penetration of Utility-scale photovoltaic (PV) farms at distributed level as well as transmission level. Power electronics converters present negative incremental impedance characteristics at their input while under regulated output control, which brings in the possibility of system instability. Recent evidence suggests that large-scale penetration of PV inverters increases the probability of instability. While IEEE standard 1547 newest version requires PV inverters to have reactive power control, there have been few investigations into the small-signal stability impact of PV inverters on distribution systems especially with reactive power control. In addition, the existing studies either use the conventional way of state space equations and eigenvalues or use time-domain simulation methodology, which are based on the assumptions that detailed models of the grid and the PV inverters are accessible. Different from the previous literatures, this research employs Generalized Nyquist Criterion (GNC) method based on measured impedances in d-q frames at connection interfaces. GNC method has the advantage that interconnection stability can be judged without knowing the grid and PV generator model details. This work first demonstrates the advantage of volt-var droop mode control among all different local reactive power control modes for PV inverters in the aspects of static impact on grid voltage profiles and power loss in a 12kV test-bed distribution system. Then it is discovered that d-q frame impedance of PV inverter under volt-var droop mode control shows a significant difference from other reactive power control modes. The d-q frame impedance derived from the small-signal model of PV generator is validated by both MATLAB simulation results and hardware experiments. Based on the d-q frame impedances, GNC is utilized to analyze the stability connection of a single PV farm and multiple PVs into the grid. GNC stability assessment results match with time-domain simulations and reveal the stability problem related to volt-var droop mode control. Furthermore, considering the unbalance of the distribution system, a new impedance model in d-q frame is proposed to capture both the dynamics of PV inverter operating in unbalanced points and the dynamics of three-phase unbalanced grid. The new impedance model is a combination of positive-negative sequence impedance and conventional d-q frame impedance. A procedure is designed for the measurement of the extended d-q frame impedance and the GNC application to predict small-signal stability of the unbalanced grid, which are justified by both time domain simulation and hardware experiments. / Doctor of Philosophy / To overcome the limited fossil fuel reserve on the earth and global warming, renewable energies become more and more popular worldwide. Centralized thermal power generators in the transmission system are gradually being replaced by distributed energy resources (DER) which are connection to the distribution system, bringing more challenges to the safe and stable operation of the power system. This work focuses on the small-signal stability impact of photovoltaic (PV) generators in the distribution system, which basically analyzes into whether the connection of PV generator to the distribution system will end up in an expected steady operation state with high resistance to any relatively small disturbances. The stability assessment tool is based on impedance measurement which treats both sides as black boxes and bridges the information gap between Utility operators and PV generator vendors. A major finding of this work is that while PV generators in the distribution system help to provide grid-support functions of voltage regulation, they may cause voltage small-signal stability problems due to the high grid impedance, which is worse if more PV inverters are put in parallel. Even PV farms connected to different branches of the complicated radial distribution system may have interactions with each other. So the design of control strategy and parameters of PV generator should consider the impact of other PV generators. GNC method based on impedances measurement is feasible and accurate for stability assessment of a distribution system with multiple PV farms. The impedance based method is upgraded and extended to be applied for the connection of power electronics devices to the three-phase unbalanced distribution systems.

In comparison with PWM converters, resonant converters are gaining increasing popularity for cases in which efficiency and power density are at a premium. However, the lack of an accurate small-signal model has become an impediment to performance optimization. Many modeling attempts have been made to date. Besides the discrete time-domain modeling, most continuous-time modeling approaches are based on fundamental approximation, and are thus unable to provide sufficient accuracy for practical use. An equivalent circuit model was proposed by Yang, which works well for series resonant converters (SRCs) with high Q (quality factor), but which is inadequate for LLC resonant converters. Furthermore, the model is rather complicated, with system orders that are as high as five and seven for the SRC and LLC converter, respectively. The crux of the modeling difficulty is due to the underlying assumption based on the use of a band-pass filter for the resonant tank in conjunction with a low-pass output filter, which is not the case for most practical applications. The matter is further complicated by the presence of a rectifier, which is a nonlinearity that mixes and matches the original modulation frequency. Thus, the modulation signal becomes intractable when using a frequency-domain modeling approach. This dissertation proposes an extended describing function modeling that is based on a Fourier analysis on the continuous-time-domain waveforms. Therefore, all important contributions from harmonics are taken into account. This modeling approach is demonstrated on the frequency-controlled SRC and LLC converters. The modeling is further extended to, with great accuracy, a charge-controlled LLC converter. In the case of frequency control, a simple third-order equivalent circuit model is provided with high accuracy up to half of the switching frequency. The simplified low-frequency model consists of a double pole and a pair of right-half-plane (RHP) zeros. The double pole, when operated at a high switching frequency, manifests the property of a well-known beat frequency between the switching frequency and the resonant frequency. As the switching frequency approaches the resonant frequency of the tank, a new pair of poles is formed, representing the interaction of the resonant tank and the output filter. The pair of RHP zeros, which contributes to additional phase delay, was not recognized in earlier modeling attempts. In the case of charge control, a simple second-order equivalent circuit model is provided. With capacitor voltage feedback, the order of the system is reduced. Consequently, the resonant tank behaves as an equivalent current source and the tank property is characterized by a single pole. The other low-frequency pole represents the output capacitor and the load. However, the capacitor voltage feedback cannot eliminate the high-frequency poles and the RHP zeros. These RHP zeros may be an impediment for high-bandwidth design if not properly treated. Based on the proposed model, these unwanted RHP zeros can be mitigated by either changing the resonant tank design or by proper feedback compensation. The accurate model is essential for a high-performance high-bandwidth LLC converter. / Doctor of Philosophy / For high-frequency power conversion, resonant converters are increasingly popular. However, the lack of an accurate small-signal model has become an impediment to performance optimization. The existing equivalent circuit model and its simplified circuit were based on fundamental approximation, where the resonant tank was deemed a good band-pass filter. These models work well for series resonant converters (SRCs) with high Q (quality factor), but are inadequate for LLC resonant converters. The crux of the modeling difficulty is due to the fact that the operation of this type of resonant converter is based on the use of a band-pass filter in conjunction with a low-pass filter. The matter is further complicated by the presence of a rectifier, which is a nonlinearity that mixes and matches the original modulation frequency. Thus, the modulation signal becomes intractable when using a frequency-domain modeling approach. This dissertation proposes an extended describing function modeling that is based on a Fourier analysis on the continuous-time-domain waveforms. Therefore, all important contributions from harmonics are taken into account. This modeling approach is demonstrated on the frequency-controlled SRC, frequency-controlled LLC converter, and charge-controlled LLC converter, and the resulting models are proven to be accurate at all frequencies. A simple equivalent circuit model is provided that targets the frequency range below the switching frequency. This simple, accurate model is able to predict the small-signal behaviors of the LLC converter with high accuracy at half of the switching frequency. At high modulation frequencies, the resonant converter behaves like a non-minimum phase system, which was neither recognized nor characterized before. This property can be represented by RHP zeros, and these RHP zeros may be an impediment for high-bandwidth design if not properly treated. Based on the proposed model, these unwanted RHP zeros can be mitigated by either changing the resonant tank design or by proper feedback compensation. Accurate modeling is essential for a high-performance high-bandwidth LLC converter.

The steady state model and analysis of a phase-shift controlled series resonant inverter (PSC-SRl) is presented. This steady state model includes the evaluation of the zero-voltage switching (ZVS) condition and the determination of the ZVS operating region. Based upon this analysis a frequency control strategy that minimizes circulating energies is proposed. Also, a methodology to design the power stage components, and to predict the duty ratio and the operating frequency range is presented using a PSC-SRl design example operating at 500 kHz and 10 kW. In addition, a novel and simple frequency control circuit that implements the proposed frequency control strategy is provided. Besides, the analysis of the PSC-SRl complete power stage and two control-loop system (frequency control and duty ratio control) is given. Furthermore, the small-signal model and the compensation schemes for each of the control loops is presented. The analytical predictions are compared with experimental data measured from a 500 kHz, 10 kW laboratory prototype and conclusions are drawn. / Ph. D.

The switching noise in a hard-switched point-of-load (POL) converter may result in false turn on, electromagnetic interference issues, or even device breakdown. A resonant cross-commutated buck (rccBuck) converter operates with low noise since all MOSFETs are turned on with zero voltage within a wide load range. A state-space model was developed to calculate the voltage gain, voltage stresses, and current stresses. Design guidelines for the rccBuck converter operating at continuous voltage mode or discontinuous voltage mode are provided. The design methodology of a one-turn inductor with significant ac and dc fluxes is given. Four fabricated one-turn inductors achieved 2.1% higher efficiency and 50% smaller total magnetic volume than the commercial inductors in the same rccBuck converter. The Omni-coupled inductors (OCI), composed of a twisted E-E core and PCB windings, further improve power density and efficiency. The core loss and inductances were modeled from a complex reluctance network. According to the loss-volume Pareto fronts, the total inductor loss was minimized within a smaller volume than that of discrete inductors. The expectations were validated by an OCI-based rccBuck converter switched at 2 MHz with 12 V input, 3.3 V at 20 A output, and peak efficiency of 96.2%. The small-signal model with a good accuracy up to half switching frequency was developed based on the averaged equivalent circuit. The transient performance of an rccBuck regulator is comparable to that of a second-order buck regulator with the same switching frequency, output capacitance, and closed-loop bandwidth. / Ph. D. / The switching noise in a hard-switched point-of-load (POL) converter may result in false turn on, electromagnetic interference issues, or even device breakdown. A resonant cross-commutated buck (rccBuck) converter operates with low noise since all MOSFETs are turned on with zero voltage within a wide load range. A state-space model was developed to calculate the voltage gain, voltage stresses, and current stresses. Design guidelines for the rccBuck converter operating at continuous voltage mode or discontinuous voltage mode are provided. The design methodology of a one-turn inductor with significant ac and dc fluxes is given. Four fabricated one-turn inductors achieved 2.1% higher efficiency and 50% smaller total magnetic volume than the commercial inductors in the same rccBuck converter. The Omni-coupled inductors (OCI), composed of a twisted E-E core and PCB windings, further improve power density and efficiency. The core loss and inductances were modeled from a complex reluctance network. According to the loss-volume Pareto fronts, the total inductor loss was minimized within a smaller volume than that of discrete inductors. The expectations were validated by an OCI-based rccBuck converter switched at 2 MHz with 12 V input, 3.3 V at 20 A output, and peak efficiency of 96.2%. The small-signal model with a good accuracy up to half switching frequency was developed based on the averaged equivalent circuit. The transient performance of an rccBuck regulator is comparable to that of a second-order buck regulator with the same switching frequency, output capacitance, and closed-loop bandwidth.

Recently, constant-on-time V2 control is more and more popular in industry products due to features of high light load efficiency, simple implementation and fast transient response. In many applications such as cell phone, camera, and other portable devices, low-ESR capacitors such as ceramic caps are preferred due to small size and small output voltage ripple requirement. However, for the converters with ceramic caps, the conventional V2 control suffers from the sub-harmonic oscillation due to the lagging phase of the capacitor voltage ripple relative to the inductor current ripple. Two solutions to eliminate sub-harmonic oscillations are discussed in [39] and the small-signal models are also derived based on time-domain describing function. However, the characteristic of constant-on-time V2 with external ramp is not fully understood and no explicit design guideline for the external ramp is provided. For digital constant on-time V2 control, the high resolution PWM can be eliminated due to constant on-time modulation scheme and direct output voltage feedback [43]. However, the external ramp design is not only related to the amplitude of the limit-cycle oscillation, but also very important to the stability of the system. The previous analysis is not thorough since numerical solution is used. The primary objective of this work is to gain better understanding of the small-signal characteristic for analog and digital constant-on-time V2 with ramp compensations, and provide the design guideline based on the factorized small-signal model. First, constant on-time current-mode control and constant on-time V2 control are reviewed. Generally speaking, constant-on-time current mode control does not have stability issues. However, for constant-on-time V2 control with ceramic caps, sub-harmonic oscillation occurs due to the lagging phase of the capacitor voltage ripple. External ramp compensation and current ramp compensation are two solutions to solve the problem. Previous equivalent circuit model extended by Ray Ridley's sample-and-hold concept is not applicable since it fails to consider the influence of the capacitor voltage ripple. The model proposed in [39] successfully considers the influence from the capacitor voltage ripple by using time-domain describing function method. However, the characteristic of constant-on-time V2 with external ramp is not fully understood. Therefore, more research focusing on the analysis is needed to gain better understanding of the characteristic and provide the design guideline for the ramp compensations. After that, the small-signal model and design of analog constant on-time V2 control is investigated and discussed. The small-signal models are factorized and pole-zero movements are identified. It is found that with increasing the external ramp, two pairs of double poles first move toward each other at half of switching frequency, after meeting at the key point, the two double poles separate, one pair moves to a lower frequency and the other moves to a higher frequency while keeping the quality factor equal to each other. For output impedance, with increasing the external ramp, the low frequency magnitude also increases. The recommended external ramp is around two times the magnitude at the key point K. When Duty cycle is larger, the damping performance is not good with only external ramp compensation, unless very high switching frequency is used. With current ramp compensation, it is recommended to design the current ramp so that the quality factor of the double pole is around 1. With current ramp compensation, the damping can be well controlled regardless of the circuit parameters. Next, the small-signal analysis and design strategy is also extended to digital constant on-time V2 control structure which is proposed in [43]. It is found that the scenario is very similar as analog constant on-time V2 control. The external ramp should be designed around the key point to improve the dynamic performance. The sampling effects of the output voltage require a larger external ramp to stabilize digital constant-on-time V2 control while suffers only a little bit of damping performance. One simple method for measuring control-to-output transfer functions in digital constant-on-time V2 control is presented. The experimental results verify the small-signal analysis except for the high frequency phase difference which reveals the delay effects in the circuit. Load transient experimental results prove the proposed design guideline for digital constant on-time V2 control. As a conclusion, the characteristics of analog and digital constant-on-time V2 control structures are examined and design guidelines are proposed for ramp compensations based on the factorized small-signal model. The analysis and design guideline are verified with simplis simulation and experimental results. / Master of Science