Thesis (M.S.)--Virginia Polytechnic Institute and State University, 1990. / Vita. Abstract. Includes bibliographical references (leaves 206-209). Also available via the Internet.

University of Macau / Faculty of Science and Technology / Department of Electrical and Computer Engineering

Leung Wing-Yan. / Thesis (M.Phil.)--Chinese University of Hong Kong, 2001. / Includes bibliographical references (leaves 131-135). / Abstracts in English and Chinese. / Chapter Chapter 1 --- Introduction --- p.1 / Chapter Chapter 2 --- Background Theory --- p.3 / Chapter 2.1 --- Low-Pass Network Synthesis --- p.3 / Chapter 2.2 --- Maximally Flat Attenuation Characteristic --- p.5 / Chapter 2.3 --- Chebysheff Attenuation Characteristic --- p.6 / Chapter 2.4 --- Low-Pass to Band-Pass Transformation --- p.8 / Chapter 2.5 --- Impedance- and Admittance- Inverters --- p.9 / Chapter 2.6 --- Coupled-Resonator Filters --- p.13 / Chapter Chapter 3 --- New Circuit Topologies for Band-Pass Filters --- p.18 / Chapter 3.1 --- Locations of Transmission Zeros --- p.18 / Chapter 3.2 --- Circuit Topologies for Generation of Transmission Zeros --- p.18 / Chapter 3.3 --- Zeros at Lower Stop-Band (Category 1) --- p.21 / Chapter 3.3.1 --- Capacitor Insertions --- p.21 / Chapter 3.3.2 --- Design Equations for Configuration I --- p.22 / Chapter 3.3.3 --- Design Equations for Configuration II --- p.24 / Chapter 3.3.4 --- Coupling between Components --- p.28 / Chapter 3.3.5 --- Design Equations for Configuration III --- p.28 / Chapter 3.4 --- Zeros at Upper Stop-Band (Category 2) --- p.32 / Chapter 3.4.1 --- Inductor Insertions --- p.32 / Chapter 3.4.2 --- Design Equations for Configuration IV --- p.33 / Chapter 3.4.3 --- Design Equations for Configuration V --- p.35 / Chapter 3.4.4 --- Coupling between Components --- p.38 / Chapter 3.4.5 --- Design Equations for Configuration VI --- p.39 / Chapter 3.4.6 --- Design Equations for Configuration VII --- p.43 / Chapter 3.5 --- Zeros at Both Lower and Upper Stop-band (Category 3) --- p.46 / Chapter 3.5.1 --- Component Insertions --- p.46 / Chapter 3.5.2 --- Design Equations for Configuration VIII --- p.49 / Chapter 3.5.3 --- Design Equations for Configuration IX-XI --- p.49 / Chapter 3.5.4 --- Coupling between components --- p.50 / Chapter 3.5.5 --- Design Equations for Configuration XII --- p.51 / Chapter Chapter 4 --- Design Considerations --- p.52 / Chapter 4.1 --- Analytical Limitation --- p.53 / Chapter 4.1.1 --- "Conventional Band-Pass Filter, Configuration II, III, V and VI" --- p.53 / Chapter 4.1.2 --- Configuration I --- p.55 / Chapter 4.1.3 --- Configuration II --- p.57 / Chapter 4.1.4 --- Configuration IV --- p.59 / Chapter 4.1.5 --- Configuration VII-XII --- p.61 / Chapter 4.1.6 --- Summary --- p.61 / Chapter 4.2 --- Practical Limitation --- p.62 / Chapter 4.2.1 --- Configuration I --- p.64 / Chapter 4.2.2 --- Configuration II --- p.65 / Chapter 4.2.3 --- Configuration III --- p.67 / Chapter 4.2.4 --- Configuration IV --- p.69 / Chapter 4.2.5 --- Configuration V --- p.71 / Chapter 4.2.6 --- Configuration VI --- p.73 / Chapter 4.2.7 --- Summary --- p.75 / Chapter 4.3 --- Comparisons between Different Configurations --- p.76 / Chapter 4.3.1 --- Category 1 (Transmission Zeros at Lower Stop-Band) --- p.76 / Chapter 4.3.2 --- Category 2 (Transmission Zeros at Upper Stop-Band) --- p.79 / Chapter 4.3.3 --- Category 3 (Transmission Zeros at both side of the Stop-Band) --- p.82 / Chapter Chapter 5 --- LTCC Technology --- p.84 / Chapter 5.1 --- Definition --- p.84 / Chapter 5.2 --- Fabrication Process --- p.85 / Chapter 5.3 --- Material Used --- p.86 / Chapter 5.3.1 --- Conductive Materials --- p.86 / Chapter 5.3.2 --- Ceramic Materials --- p.87 / Chapter 5.4 --- Advantages of LTCC Technology --- p.87 / Chapter 5.5 --- Recent Development in LTCC Technology --- p.89 / Chapter 5.6 --- Design Rules --- p.90 / Chapter 5.7 --- Realization of Passive Elements in LTCC --- p.91 / Chapter 5.7.1 --- Capacitors --- p.91 / Chapter 5.7.2 --- Inductors --- p.96 / Chapter 5.7.3 --- Effect of Ground Plane on Inductance Realization --- p.99 / Chapter Chapter 6 --- Implementation and Characterization of LTCC Band-Pass Filter --- p.101 / Chapter 6.1 --- Design Procedures --- p.101 / Chapter 6.2 --- Schematic Design of LTCC Filters --- p.103 / Chapter 6.2.1 --- Category1 --- p.103 / Chapter 6.2.2 --- Category2 --- p.104 / Chapter 6.2.3 --- Category3 --- p.105 / Chapter 6.3 --- Design and Optimization --- p.106 / Chapter 6.4 --- Performance Evaluation --- p.117 / Chapter 6.4.1 --- TRL Calibration Method --- p.119 / Chapter 6.4.2 --- Experimental Results --- p.126 / Chapter Chapter 7 --- Conclusion and Recommendations for Future Work --- p.129 / References --- p.131 / Author´ةs Publication --- p.135 / Appendix A CAD Tool for LTCC Circuit Prototyping --- p.136 / Appendix B Computer Program 1 Listing --- p.153 / Appendix C Computer Program 2 Listing --- p.170 / Appendix D Computer Program 3 Listing --- p.172

This thesis proposes a new bandpass filter prototype modified based on T-type coupled resonator architecture by considering the parasitic shunt capacitance effect. After derivation, the new prototype can be proved equivalent to third-order Chebyshev bandpass filter. It is easy to realize the new prototype circuit by utilizing the inductor and capacitor library established from electromagnetic simulations. The couplings between circuit components can cause some transmission zeros to enhance attenuation rate at stopbands. This thesis designs several bandpass filters embedded in 4-layer laminate package substrate with center frequency at 2.45GHz. The measurement results show that most of these filters can achieve less than 1.7dB insertion loss and more than 14dB return loss at passband, and more than 30dB attenuation at 950MHz, 4.8GHz and 7.2GHz. One of the filters has a size of 1.9¡Ñ2.7mm2, which is the smallest area for the currently reported bandpass filters embedded in the organic package substrate.

This thesis is mainly divided into two parts. The first part discusses in detail design flow of the coupled-resonator bandpass filters, including basic theory of synthesis and the procedure of electromagnetic (EM) simulation. In the second part, by using the above-mentioned design flow, different structure filters have been implemented on organic substrates. The coupled-resonator BPF designs are verified to overcome the elements¡¦ parasitic effects, and thus can be optimized with high degree of freedom. In practice, a 3rd-order bandpass filter by coupling three spiral resonators has been proposed and implemented, having miniature and wide stopband characteristics. Finally, a two-layer 4th-order cross-couple bandpass filter with a pair of transmission zeros has been also proposed and implemented, achieving a significant size reduction of 50% compared with the single-layer design. The simulation and measurement results have good agreement for all design cases in this thesis.

A second-generation CMOS current controlled conveyor (CCCII) and a tunable IF bandpass filter based on the CCCII are developed. The high frequency property and the control ability of the current conveyor makes the bandpass filter tunable in the range between 55MHz~410MHz, which is suitable for the IF filter application that is around 200MHz~300MHz. The Q-factor is also tunable and has a maximum value up to 800.

A novel CMOS tunable bandpass filter and a novel voltage controlled oscillator are proposed. Both circuits are designed using the UMC 0.5£gm CMOS process parameters. The CMOS tunablebandpass filter is realised by using the intrinic parasitic capacitance of the MOS transistor. This filter has neither on-chip planar inductor nor poly-capacitance; therefore, the chip area is reduced. Simulation results show that the bandpass filter is tunable in the range between 190MHz and 347MHz. Therefore, the filter is suitable for the IF filter application that is between 200MHz and 300MHz. The Q-factor is also tunable and has a maximum value of 983. Applying the circuit of the bandpass filter, a second order voltage controlled oscillator is designed. Simulation results show that the voltage controllable oscillator is tunable in the range between 444MHz and 746MHz.

Software radio architecture can support multiple standards by performing analogto- digital (A/D) conversion of the radio frequency (RF) signals and running reconfigurable software programs on the backend digital signal processor (DSP). A slight variation of this architecture is the software defined radio architecture in which the A/D conversion is performed on intermediate frequency (IF) signals after a single down conversion. The first part of this research deals with the design and implementation of a fourth order continuous time bandpass sigma-delta (CT BP) C based on LC filters for direct RF digitization at 950 MHz with a clock frequency of 3.8 GHz. A new ADC architecture is proposed which uses only non-return to zero feedback digital to analog converter pulses to mitigate problems associated with clock jitter. The architecture also has full control over tuning of the coefficients of the noise transfer function for obtaining the best signal to noise ratio (SNR) performance. The operation of the architecture is examined in detail and extra design parameters are introduced to ensure robust operation of the ADC. Measurement results of the ADC, implemented in IBM 0.25 µm SiGe BiCMOS technology, show SNR of 63 dB and 59 dB in signal bandwidths of 200 kHz and 1 MHz, respectively, around 950 MHz while consuming 75 mW of power from ± 1.25 V supply. The second part of this research deals with the design of a fourth order CT BP ADC based on gm-C integrators with an automatic digital tuning scheme for IF digitization at 125 MHz and a clock frequency of 500 MHz. A linearized CMOS OTA architecture combines both cross coupling and source degeneration in order to obtain good IM3 performance. A system level digital tuning scheme is proposed to tune the ADC performance over process, voltage and temperature variations. The output bit stream of the ADC is captured using an external DSP, where a software tuning algorithm tunes the ADC parameters for best SNR performance. The IF ADC was designed in TSMC 0.35 µm CMOS technology and it consumes 152 mW of power from ± 1.65 V supply.

In this thesis, we propose a miniaturized LTCC balanced filter that integrates bandpass filter (BPF) and balun. In order to reject interferences, we have the transmission zero of out-band by extra capacities and inductances in the prototype of Second-Order BPF. On the other hand, we miniaturize the balun by revising the length of couple-line with four shunt capacities. The practice size of the miniaturized balanced filter is 2.0mm x 1.25mm x 0.95mm.The insertion and return losses are less than -2.5dB and -20dB over operating frequency band, respectively. The phase difference is less than 5 ¢X, and the amplitude difference is within -0.5dB in operating frequency band. The size is the smallest in the similar commercial product and relative journal.

Thesis (Ph.D.)--City University of Hong Kong, 2009. / "Submitted to the Department of Electronic Engineering in partial fulfillment of the requirements for the degree of Doctor of Philosophy." Includes bibliographical references (leaves 141-158)