Yau Chi-kit. / Thesis (M.Phil.)--Chinese University of Hong Kong, 2002. / Includes bibliographical references (leaves 149-151). / Abstracts in English and Chinese. / Abstract / Acknowledgements / Table of Contents / Chapter Chapter 1 --- Introduction --- p.1 / Chapter Chapter 2 --- Background Theory --- p.5 / Chapter 2.1 --- Power Dividers and Couplers --- p.5 / Chapter 2.1.1 --- 3dB Wilkinson Power Divider --- p.5 / Chapter 2.1.2 --- Branch Line Coupler --- p.9 / Chapter 2.2 --- Balanced Amplifier --- p.11 / Chapter 2.2.1 --- Working Mechanism of Balanced Amplifier --- p.11 / Chapter 2.2.2 --- Effects of Coupler's Phase Imbalance and Gain Mismatch --- p.15 / Chapter 2.3 --- Low Temperature Co-fired Ceramic (LTCC) Technology --- p.21 / Chapter 2.3.1 --- Overview of LTCC Technology --- p.21 / Chapter 2.3.2 --- LTCC Material Properties and Performance --- p.23 / Chapter 2.3.3 --- Advantages and Disadvantages of LTCC Technology --- p.24 / Chapter Chapter 3 --- LTCC Basic Components Characterization --- p.27 / Chapter 3.1 --- Embedded Capacitors --- p.28 / Chapter 3.1.1 --- Vertical Structure for Embedded Capacitors --- p.28 / Chapter 3.1.2 --- Shunt Capacitor --- p.29 / Chapter 3.1.3 --- Series Capacitor --- p.45 / Chapter 3.2 --- Embedded Inductors --- p.54 / Chapter 3.2.1 --- Shunt Inductor --- p.54 / Chapter 3.2.2 --- Series Inductor --- p.61 / Chapter Chapter 4 --- Design Methodology for LTCC Integrated Passive Devices (IPD) --- p.69 / Chapter 4.1 --- LTCC Circuit Design Roadmap --- p.70 / Chapter 4.2 --- Design of a 1.88GHz Lumped Element 3dB Branch Line Coupler --- p.73 / Chapter 4.2.1 --- Vertical Structure --- p.73 / Chapter 4.2.2 --- Design Specifications --- p.74 / Chapter 4.2.3 --- Schematic Design --- p.74 / Chapter 4.2.4 --- Design Library --- p.79 / Chapter 4.2.5 --- Commercial EM Simulator --- p.83 / Chapter 4.2.6 --- Layout and Optimization Designs --- p.89 / Chapter 4.3 --- Design of a 1.88GHz Lumped Element 3dB Wilkinson's Power Divider with 90° phase difference between two outputs --- p.96 / Chapter 4.4 --- 3-port Measurement Technique --- p.106 / Chapter Chapter 5 --- Noise Analysis and Noise Parameters Measurement --- p.110 / Chapter 5.1 --- Noise Figure of an Amplifier --- p.110 / Chapter 5.2 --- Noise Correlation Matrices --- p.114 / Chapter 5.2.1 --- Definition --- p.114 / Chapter 5.2.2 --- Transformation of Representation --- p.116 / Chapter 5.2.3 --- Connection of Correlation Matrices --- p.117 / Chapter 5.3 --- Noise Characterization --- p.118 / Chapter 5.3.1 --- Conventional Measurement Technique --- p.118 / Chapter 5.3.2 --- Determination of Noise Parameters Using Four Nonsingular Measurements --- p.119 / Chapter 5.3.3 --- A De-embedding Technique for Extracting Noise Parameters --- p.121 / Chapter Chapter 6 --- Design of a 1.88GHz LTCC Balanced LNA --- p.126 / Chapter 6.1 --- Design Specifications --- p.126 / Chapter 6.2 --- Design of LTCC D.C. Biasing Circuit --- p.128 / Chapter 6.3 --- Stability Consideration --- p.129 / Chapter 6.4 --- Matching Networks Design --- p.133 / Chapter 6.4.1 --- Input Matching Network --- p.133 / Chapter 6.4.2 --- Output Matching Network --- p.136 / Chapter 6.5 --- Design of the LTCC Balanced LNA --- p.140 / Chapter Chapter 7 --- Conclusion and Future Work --- p.148 / References --- p.149 / Author's Publication --- p.152 / Appendix A Even and Odd Modes Analysis for Power Dividers --- p.153 / Appendix B TRL Calibration Technique --- p.162

Thesis (M.S.)--Ohio University, March, 1981. / Title from PDF t.p.

Thesis (M. App. Sc.)--Carleton University, 2004. / Includes bibliographical references (p. 84-93). Also available in electronic format on the Internet.

R.M. Fano. / "January 2, 1948." / Bibliography: p. 34. / Army Signal Corps Contract W-36-039 sc-32037.

University of Macau / Faculty of Science and Technology / Department of Electrical and Computer Engineering

Thesis (Ph. D.)--Ohio State University, 2005. / Available online via OhioLINK's ETD Center; full text release delayed at author's request until 2008 Dec 1

The design of an analog frontend including a receiver amplifier (RX) and laser diode driver (LDD) for optical communication system is described. The RX consists of a transimpedance amplifier, a limiting amplifier, and an output buffer (BUF). An offset compensation and common-mode control circuit is designed using switched-capacitor technique to save chip area, provides continuous reduction of the offset in the RX. Active-peaking methods are used to enhance the bandwidth and gain. The very low gate-oxide breakdown voltage of transistors in deep sub-micron technologies is overcome in the LDD by implementing a topology which has the amplifier placed in a floating well. It comprises a level shifter, a pre-amplifier, and the driver stage. The single-chip frontend, fabricated in a 28 nm bulk-digital complementary metal–oxide–semiconductor (CMOS) process has a total active area of 0.003 mm² , is among the smallest optical frontends. Without the BUF, which consumes 8 mW from a separate supply, the RX power consumption is 21 mW, while the LDD consumes 32 mW. Small-signal gain and bandwidth are measured. A photo diode and laser diode are bonded to the chip on a test-printed circuit board. Electro-optical measurements show an error-free detection with a bit error rate of 10⁻¹² at 20 Gbit/s of the RX at and a 25 Gbit/s transmission of the LDD.

Recent research focuses on expanding the use of RF/Microwave circuits and systems to include multi-disciplinary applications. One example is the detection of the dielectric properties of chemicals and bio-chemicals at microwave frequencies, which is useful for pharmaceutical applications, food and drug safety, medical diagnosis and material characterization. Dielectric spectroscopy is also quite relevant to detect the frequency dispersive characteristics of materials over a wide frequency range for more accurate detection. In this dissertation, on-chip and on-board solutions for microwave chemical sensing are proposed. An example of an on-chip dielectric detection technique for chemical sensing is presented. An on-chip sensing capacitor, whose capacitance changes when exposed to material under test (MUT), is a part of an LC voltage-controlled oscillator (VCO). The VCO is embedded inside a frequency synthesizer to convert the change in the free runing frequency frequency of the VCO into a change of its input voltage. The system is implemented using 90 nm CMOS technology and the permittivities of MUTs are evaluated using a unique detection procedure in the 7-9 GHz frequency range with an accuracy of 3.7% in an area of 2.5 × 2.5 mm^2 with a power consumption of 16.5 mW. The system is also used for binary mixture detection with a fractional volume accuracy of 1-2%. An on-board miniaturized dielectric spectroscopy system for permittivity detec- tion is also presented. The sensor is based on the detection of the phase difference be- tween the input and output signals of cascaded broadband True-Time-Delay (TTD) cells. The sensing capacitor exposed to MUTs is a part of the TTD cell. The change of the permittivity results in a change of the phase of the microwave signal passing through the TTD cell. The system is fabricated on Rogers Duroid substrates with a total area of 8 × 7.2 cm2. The permittivities of MUTs are detected in the 1-8 GHz frequency range with a detection accuracy of 2%. Also, the sensor is used to extract the fractional volumes of mixtures with accuracy down to 1%. Additionally, multi-band and multi-standard communication systems motivate the trend to develop broadband front-ends covering all the standards for low cost and reduced chip area. Broadband amplifiers are key building blocks in wideband front-ends. A broadband resistive feedback low-noise amplifier (LNA) is presented using a composite cross-coupled CMOS pair for a higher gain and reduced noise figure. The LNA is implemented using 90 nm CMOS technology consuming 18 mW in an area of 0.06 mm2. The LNA shows a gain of 21 dB in the 2-2300 MHz frequency range, a minimum noise figure of 1.4 dB with an IIP3 of -1.5 dBm. Also, a four-stage distributed amplifier is presented providing bandwidth extension with 1-dB flat gain response up to 16 GHz. The flat extended bandwidth is provided using coupled inductors in the gate line with series peaking inductors in the cascode gain stages. The amplifier is fabricated using 180 nm CMOS technology in an area of 1.19 mm2 achieving a power gain of 10 dB, return losses better than 16 dB, noise figure of 3.6-4.9 dB and IIP3 of 0 dBm with 21 mW power consumption. All the implemented circuits and systems in this dissertation are validated, demonstrated and published in several IEEE Journals and Conferences.

La systématisation de la conversion analogique/numérique a eu pour effet d'uniformiser le mode de transmission de données aux transmissions numériques ; et notamment sur fibre optique. Dans ce cadre, cette thèse traite des méthodologies de conception et faisabilité de circuits amplificateurs de signaux rapides. Après l'étude de l'effet des éléments parasites sur les structures amplificatrices de base (spécifiquement, les problèmes de chemins de masse, et de référencement de signaux d'entrée), la théorie de distribution est appliquée à la technologie coplanaire InP ; où via une méthodologie que nous avons cherché à systématiser (notamment pour les conditions d'égalité et de faible variation des délais de groupe), sont réalisés des amplificateurs large bande avec Fc=92GHz et entre autres, un produit gain-bande à l'état de l'art de 410 GHz. Au delà des problèmes posés par la technologie coplanaire tels que les discontinuités de masse et la nécessité de préserver le mode de propagation coplanaire, elle ouvre de nouvelles possibilités telles que des lignes artificielles d'entrée/sortie à longueurs identiques, et permet une compacité plus élevée que celle des techniques micro-ruban. Les limites de l'amplification différentielle sont ensuite investies et repoussées, en proposant une structure innovante : la paire différentielle distribuée ; alliant ainsi le fonctionnement à courant constant du mode différentiel (donc avec un degré de liberté supplémentaire, pour le potentiel DC en sortie), à l'aspect large bande du distribué. Des amplificateurs avec 4 Vpp en sortie à 40 Gbit/s ont ainsi été réalisés en pHEMT GaAs. Ce résultat, permettrait à terme, l'élimination des capacités de passage dans les modules driver et la conception de drivers de modulateur mono-puce.