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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.

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Showing 1 to 2 of 2 (0.053 seconds)

Spelling suggestions: "subject:"contraflow"" "subject:"controlfor""

1

Interconnection Optimization for Dataflow Architectures

Moser, Nico, Gremzow, Carsten, Menge, Matthias 08 June 2007 (has links) (PDF)
In this paper we present a dataflow processor architecture based on [1], which is driven by controlflow generated tokens. We will show the special properties of this architecture with regard to scalability, extensibility, and parallelism. In this context we outline the application scope and compare our approach with related work. Advantages and disadvantages will be discussed and we suggest solutions to solve the disadvantages. Finally an example of the implementation of this architecture will be given and we have a look at further developments. We believe the features of this basic approach predestines the architecture especially for embedded systems and system on chips.
Chaining methods
Controlflow driven Dataflow architecture
adjustment datapaths to FPGA-structures
embedded systems
ddc:004
ddc:500
Eingebettetes System
Systementwurf
2

Interconnection Optimization for Dataflow Architectures

Moser, Nico, Gremzow, Carsten, Menge, Matthias 08 June 2007 (has links)
In this paper we present a dataflow processor architecture based on [1], which is driven by controlflow generated tokens. We will show the special properties of this architecture with regard to scalability, extensibility, and parallelism. In this context we outline the application scope and compare our approach with related work. Advantages and disadvantages will be discussed and we suggest solutions to solve the disadvantages. Finally an example of the implementation of this architecture will be given and we have a look at further developments. We believe the features of this basic approach predestines the architecture especially for embedded systems and system on chips.
info:eu-repo/classification/ddc/004
ddc:004
info:eu-repo/classification/ddc/500
ddc:500
Eingebettetes System
Systementwurf
Chaining methods
Controlflow driven Dataflow architecture
adjustment datapaths to FPGA-structures
embedded systems

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