In this thesis, we propose a new protocol named Layered TCP with RTT Compensation (LTCP-RC, for short). LTCP-RC is a simple modification to the congestion window response of the high-speed protocol, Layered TCP (LTCP). In networks characterized by large link delays and high RTTs, LTCP-RC makes the LTCP protocol more scalable. Ack-clocked schemes, similar to TCP, suffer performance problems like long convergence time and throughput degradation, when RTT experienced by the flow increases. Also, when flows with different RTTs compete, the problem of unfairness among competing flows becomes worse in the case of high-speed protocols. LTCP-RC uses an RTT Compensation technique in order to solve these problems. This thesis presents a general framework to decide the function for RTT Compensation factor and two particular design choices are analyzed in detail. The first algorithm uses a fixed function based on the minimum RTT observed by the flow. The second algorithm uses an adaptive scheme which regulates itself according to the dynamic network conditions. Evaluation of the performance of these schemes is done using analysis and ns-2 simulations. LTCP-RC exhibits significant performance improvement in terms of reduced convergence time, low drop rates, increased utilization in presence of links with channel errors and good fairness properties between the flows,. The scheme is simple to understand, easy to implement on the TCP/IP stack and does not require any additional support from the network resources. The choice of parameters can be influenced to tune the RTT unfairness of the scheme, which is not possible in TCP or other high-speed protocols. The flexible nature of the analysis framework has laid the ground work for the development of new schemes, which can improve the performance of the window based protocols in high delay and heterogeneous networks.

There is an ever increasing demand for higher spectral usage in wireless communication, radar and imaging systems. Higher spectral efficiency can be achieved using components that are aware of system environment and adapt suitably to the operating conditions. In this regard, radio frequency (RF) signal analysis is of paramount interest. Emergence of dispersive delay networks (DDN) has led to the significant development of microwave analogue-signal processing (ASP) and analysis. DDN causes displacement of spectral components in time domain, relative to the frequency dependant group delay response. The main challenge in the design of DDN in this context is in achieving broad bandwidth with high group delay dispersion (GDD). In this regard, all-pass networks (APN) have been explored as a potential wide-band DDN owing to the possibility of controlling the magnitude of loss characteristics without affecting the dispersion in group delay response. The synthesis procedure of lumped element APN using approximation methods is well known at audio frequencies. Most of these use operational amplifier and cannot be extended directly to RF. There is no generalised closed form analytical procedure at RF for the synthesis of APN with the required GDD. In this regard, this dissertation presents the design and implementation of all-pass networks as wide-band dispersive delay networks at radio frequencies. In this work, we begin by analysing the signal propagation through a DDN with a linear group delay response over a broad bandwidth. It is found that the signal experiences expansion of pulse width, reduction of its peak amplitude and a temporal displacement of the spectral components. Analytical expressions derived help initial synthesis of group delay response required for various ASP applications. As the first step towards implementation at RF, a single stage APN is designed using surface mount devices (SMD). This design approach takes into account practical issues such as parasitic due to mounting pads, available component values, physical dimensions, self-resonance frequency (SRF) and finite Q factor of the components used. Full wave simulation of the design with transmission line pads and components is carried out. This implementation is useful for frequencies up to the component SRF, generally about 5 GHz. This design approach makes the circuit footprint independent of frequency and the performance is limited only by the Q factor of the adopted technology. The Q factor affects the loss characteristics with a negligible effect on group delay response in the frequency band of interest. In order to extend the APN design for high group delay, a novel board level implementation is developed consisting of both lumped SMD components and distributed elements. The implementation results in a lower sensitivity of group delay performance to the commercially specified component value tolerances than the approach using all SMD components. It has been experimentally verified that the measured group delay is 2.4 ns at 1.85 GHz, which is thrice that reported in other approaches. The implementation has a reduced circuit footprint and is attractive in practical applications as it is a single layer micro strip realisation with less complex fabrication procedure and fewer components to assemble. As an extension of this towards wideband cascaded APN, an iterative design procedure is developed to achieve a monotonous group delay response over a broad bandwidth. The approach facilitates cascading of multiple stages of lumped APN with different resonance frequency and peak group delay to obtain linear and non-linear group delay responses with both positive and negative GDD. Circuits with both positive and negative GDD are required for various ASP applications such as compressive receivers and the present approach is unique in obtaining both the responses, not possible with many other RF dispersion techniques. Circuit models have been simulated by cascading transfer function responses of the individual APNs. The design is further extended for SMD implementation. To validate the above approach, a two stage APN is designed in the frequency range [0.5 - 1] GHz for a linear GDD of ±6 ns/GHz. Two negative GDD APNs are further cascaded to obtain a four stage implementation with an overall GDD of -12 ns/GHz. The experimental results are compared with full wave simulations for validation. The design using lumped SMD components has greatly improved the performance in terms of GDD with a reduced circuit footprint and lower insertion loss than previously reported approaches. As practical examples, the ASP modules are experimentally demonstrated using the fabricated APN. Frequency discrimination of two input frequencies with a frequency resolution of 500 MHz is demonstrated. Higher GDD results in higher separation of frequency components in time domain. Pulse compression and magnification is also demonstrated for different wideband LFM input signals. The dispersion effects of amplitude reduction, pulse width expansion and frequency chirping are thereby validated experimentally. In summary, the approaches presented in this dissertation enable the design of wideband all-pass networks to introduce dispersion delays over wide bandwidths, opening up the possibility for their use in analogue signal processing at radio frequencies. Some of these applications have been experimentally demonstrated and validated using time frequency analysis.

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The paradigm of network coding was introduced as a means to conserve bandwidth (or equivalently increase throughput) in information flow networks. Network coding makes use of the fact that unlike physical commodities, information can be replicated and coded together at the nodes of the network. As a result, routing can be strictly suboptimal in many classes of information flow networks compared to network coding. Network-error correction is the art of designing network codes such that the sinks of the network will be able to decode the required information in the presence of errors in the edges of the network, known as network-errors. The network coding problem on a network with given sink demands can be considered to have the following three major subproblems, which naturally also extend to the study of network-error correcting codes, as they can be viewed as a special class of network codes (a) Existence of a network code that satisfies the demands (b) Efficient construction of such a network code (c) Minimum alphabet size for the existence of such a network code. This thesis primarily considers linear network coding and error correction and in- vestigates solutions to these issues for certain classes of network coding and error correction problems in acyclic networks. Our contributions are broadly summarised as follows. (1) We propose the use of convolutional codes for multicast network-error correc- tion. Depending upon the number of network-errors required to be corrected in the network, convolutional codes are designed at the source of the multicast network so that these errors can be corrected at the sinks of the networks as long as they are separated by certain number of time instants (for which we give a bound). In con- trast to block codes for network-error correction which require large field sizes, using convolutional codes enables the field size of the network code to be small. We discuss the performance of such networks under the BSC edge error model. (2)Existing construction algorithms of block network-error correcting codes require a rather large field size, which grows with the size of the network and the number of sinks, and thereby can be prohibitive in large networks. In our work, we give an algorithm which, starting from a given network-error correcting code, can obtain an- other network code using a small field, with the same error correcting capability as the original code. The major step in our algorithm is to find a least degree irreducible poly- nomial which is coprime to another large degree polynomial. We utilize the algebraic properties of finite fields to implement this step so that it becomes much faster than the brute-force method. A recently proposed algorithm for network coding using small fields can be seen as a special case of our algorithm for the case of no network-errors. (3)Matroids are discrete mathematical objects which generalize the notion of linear independence of sets of vectors. It has been observed recently that matroids and network coding share a deep connection, and several important results of network coding has been obtained using these connections from matroid theory. In our work, we establish that matroids with certain special properties correspond to networks with error detecting and correcting properties. We call such networks as matroidal error detecting (or equivalently, correcting) networks. We show that networks have scalar linear network-error detecting (or correcting) codes if and only if there are associated with representable matroids with some special properties. We also use these ideas to construct matroidal error correcting networks along with their associated matroids. In the case of representable matroids, these algorithms give rise to scalar linear network- error correcting codes on such networks. Finally we also show that linear network coding is not sufficient for the general network-error detection (correction) problem with arbitrary demands. (4)Problems related to network coding for acyclic, instantaneous networks have been extensively dealt with in the past. In contrast, not much attention has been paid to networks with delays. In our work, we elaborate on the existence, construction and minimum field size issues of network codes for networks with integer delays. We show that the delays associated with the edges of the network cannot be ignored, and in fact turn out to be advantageous, disadvantageous or immaterial, depending on the topology of the network and the network coding problem considered. In the process, we also show multicast network codes which involve only delaying the symbols arriving at the nodes of the networks and coding the delayed symbols over a binary field, thereby making coding operations at the nodes less complex. (5) In the usual network coding framework, for a given set of network demands over an arbitrary acyclic network with integer delays assumed for the links, the out- put symbols at the sink nodes, at any given time instant, is a Fq-linear combination of the input symbols generated at different time instants where Fq denotes the field over which the network operates. Therefore the sinks have to use sufficient memory elements in order to decode simultaneously for the entire stream of demanded infor- mation symbols. We propose a scheme using an ν-point finite-field discrete fourier transform (DFT) which converts the output symbols at the sink nodes at any given time instant, into a Fq-linear combination of the input symbols generated during the same time instant without making use of memory at the intermediate nodes. We call this as transforming the acyclic network with delay into ν-instantaneous networks (ν is sufficiently large). We show that under certain conditions, there exists a network code satisfying sink demands in the usual (non-transform) approach if and only if there exists a network code satisfying sink demands in the transform approach.