The aim of work is to present and analyse assessment of the current state and at the same time the proposal of adjustments to the technology or parameters, the introduction of the wire into the drawing machine. The problem arises when the introduction of wire with a diameter of 14 mm from the material CK 67 to the drawbenches Schumag. If we introduce the wire into the drawing machines with two primary beams leads to a buckling of the wire and pack between the drawing die and the boot device. For the introduction of wire are used hydraulic boot collets, which are controlled semi-automatically. In connection with professional studies and on the basis of the calculation, simulation and practical experiment have been identified the conditions allowing the current method of deployment of wire to use.

Significant progress in reducing the growth temperature of the SiC epitaxial growth became possible in the previous work by using new chloro-carbon epitaxial growth method. However, it was established that even in the new process, homogenous nucleation of Si in the gas phase limited the growth rate. In the present work, new chlorinated silicon precursor SiCl4 was investigated as a replacement for the traditional silicon precursor SiH4 during the low-temperature chlorocarbon epitaxial growth. The new process completely eliminated the homogenous nucleation in the gas phase. Growth rate of 5-6 μm/h was achieved at 1300°C compared to less than 3 μm/h in the SiH4-based growth. The growth dependence on the C/Si ratio revealed that the transition from the C-supply-limited to the Si-supply-limited growth mode takes place at the value of the C/Si ratio much higher than unity, suggesting that certain carbon-containing species are favorably excluded from the surface reactions in the new process. Morphology degradation mechanisms, which are unique for the lowtemperature growth, were observed outside the established process window. Prior to this work, it remained unclear if CH3Cl simply served as a source of Cl to suppress homogeneous nucleation in the gas phase, or if it brought some other unknown improvements. In this work true benefits of CH3Cl in providing unique improvement mechanisms have been revealed. It was established that CH3Cl provided a much wider process window compared to C3H8. In contrast, even a very significant supply of extra Cl from a chlorinated silicon precursor or from HCl during the C3H8-based growth could not provide a similar benefit. The combination of the chloro-carbon and the chloro-silane precursors was also investigated at conventional growth temperature. High-quality thick epitaxial layers, with the growth rate up to 100μm/h were obtained, and the factors influencing the growth rate and morphology were investigated. Extensive optical and electrical characterization of the low-temperature and the regular-temperature epitaxial layers was conducted. The device-quality of the lowtemperature chloro-carbon epilayers was validated for the first time since the development of the chloro-carbon epitaxial process in the year 2005 by fabricating simple Schottky diodes and investigating their electrical characteristics.

This doctorate thesis focuses on investigating the parameter space involved in numerically modeling the bandgap engineering of a GaInP/InGaAs/Ge lattice matched multi-junction solar cell (MJSC) using InAs/InGaAs quantum dots (QDs) in the middle sub-cell. The simulation environment – TCAD Sentaurus – solves the semiconductor equations using finite element and finite difference methods throughout well-defined meshes in the device to simulate the optoelectronic behavior first for single junction solar cells and subsequently for MJSCs with and without quantum dots under concentrated illumination of up to 1000 suns’ equivalent intensity. The MJSC device models include appropriate quantum tunneling effects arising in the tunnel junctions which serve as transparent sub-cell interconnects. These tunneling models are calibrated to measurements of AlGaAs/GaAs and AlGaAs/AlGaAs tunnel junctions reaching tunneling peak current densities above 1000 A/cm^2. Self-assembled InAs/GaAs quantum dots (QDs) are treated as an effective medium through a description of appropriate generation and recombination processes. The former includes analytical expressions for the absorption coefficient that amalgamates the contributions from the quantum dot, the InAs wetting layer (WL) and the bulk states. The latter includes radiative and non-radiative lifetimes with carrier capture and escape considerations from the confinement potentials of the QDs. The simulated external quantum efficiency was calibrated to a commercial device from Cyrium Technologies Inc., and required 130 layers of the QD effective medium to match the contribution from the QD ground state. The current – voltage simulations under standard testing conditions (1 kW/cm^2, T=298 K) demonstrated an efficiency of 29.1%, an absolute drop of 1.5% over a control structure. Although a 5% relative increase in photocurrent was observed, a 5% relative drop in open circuit voltage and an absolute drop of 3.4% in fill factor resulted from integrating lower bandgap nanostructures with shorter minority carrier lifetimes. However, these results are considered a worst case scenario since maximum capture and minimum escape rates are assumed for the effective medium model. Decreasing the band offsets demonstrated an absolute boost in efficiency of 0.5% over a control structure, thus outlining the potential benefits of using nanostructures in bandgap engineering MJSCs.

This doctorate thesis focuses on investigating the parameter space involved in numerically modeling the bandgap engineering of a GaInP/InGaAs/Ge lattice matched multi-junction solar cell (MJSC) using InAs/InGaAs quantum dots (QDs) in the middle sub-cell. The simulation environment – TCAD Sentaurus – solves the semiconductor equations using finite element and finite difference methods throughout well-defined meshes in the device to simulate the optoelectronic behavior first for single junction solar cells and subsequently for MJSCs with and without quantum dots under concentrated illumination of up to 1000 suns’ equivalent intensity. The MJSC device models include appropriate quantum tunneling effects arising in the tunnel junctions which serve as transparent sub-cell interconnects. These tunneling models are calibrated to measurements of AlGaAs/GaAs and AlGaAs/AlGaAs tunnel junctions reaching tunneling peak current densities above 1000 A/cm^2. Self-assembled InAs/GaAs quantum dots (QDs) are treated as an effective medium through a description of appropriate generation and recombination processes. The former includes analytical expressions for the absorption coefficient that amalgamates the contributions from the quantum dot, the InAs wetting layer (WL) and the bulk states. The latter includes radiative and non-radiative lifetimes with carrier capture and escape considerations from the confinement potentials of the QDs. The simulated external quantum efficiency was calibrated to a commercial device from Cyrium Technologies Inc., and required 130 layers of the QD effective medium to match the contribution from the QD ground state. The current – voltage simulations under standard testing conditions (1 kW/cm^2, T=298 K) demonstrated an efficiency of 29.1%, an absolute drop of 1.5% over a control structure. Although a 5% relative increase in photocurrent was observed, a 5% relative drop in open circuit voltage and an absolute drop of 3.4% in fill factor resulted from integrating lower bandgap nanostructures with shorter minority carrier lifetimes. However, these results are considered a worst case scenario since maximum capture and minimum escape rates are assumed for the effective medium model. Decreasing the band offsets demonstrated an absolute boost in efficiency of 0.5% over a control structure, thus outlining the potential benefits of using nanostructures in bandgap engineering MJSCs.

Este trabalho apresenta o desenvolvimento de um sensor de corrente transiente destinado a detectar a ocorrência de um evento transiente causado pela incidência de radiação ionizante em um circuito integrado. Iniciando com uma descrição dos efeitos da radiação sobre os circuitos integrados e dos tipos de radiação de interesse, os fundamentos da técnica Bulk- BICS são apresentados e as propostas existentes na literatura são expostas e avaliadas, com ênfase no sensor que utiliza a célula de memória dinâmica DynBICS, resultado de um trabalho prévio e do qual se dispõe de amostras fabricadas. Sobre essas amostras são efetuados testes elétricos, um ensaio de dose total irradiada TID e um ensaio de estimulação laser, cujos resultados são apresentados e confirmam a funcionalidade da topologia da célula de memória dinâmica aplicada a circuitos Bulk-BICS. Em seguida, é apresentada a topologia da célula de memória integrativa como uma evolução da célula de memória dinâmica e propõe-se o circuito de um novo sensor Bulk-BICS baseado na nova célula. O funcionamento elétrico do circuito desse novo sensor TRIBICS é avaliado através de simulação de circuitos determinando-se a sensibilidade e o tempo de resposta do sensor utilizando-se pulsos de corrente em dupla exponencial. É feita uma análise do funcionamento da célula de memória estática e, através de uma comparação de desempenho entre as células de memória estáticas utilizadas em três circuitos propostos e a célula de memória integrativa, utilizando um modelo simplificado, mostra-se que a célula de memória integrativa é mais rápida e sensível do que as contrapartes estáticas O sensor TRIBICS é então simulado em conexão com um modelo de dispositivo, sendo antes apresentados os modelos TCAD do inversor utilizado como alvo da incidência da radiação nas simulações. São apresentados resultados obtidos individualmente para o transistor NMOS e para o transistor PMOS, nos quais se mostra a formação de um canal condutivo entre dreno e fonte durante o SET. Mostra-se, também, que os resultados obtidos com a simulação de dispositivos não concorda com aqueles proporcionados pela simulação de circuitos no tocante à divisão das correntes transitórias entre dreno, fonte e substrato. O resultado das simulações de dispositivo efetuadas com os modelos TCAD em modo misto com o circuito TRIBICS descrito em SPICE mostram a relação entre a transferência de energia da irradiação LET e a efetiva deteção do SET provocado, em função da distância entre os contatos de bulk ou substrato, permitindo determinar a máxima distância entre contatos para 100% de certeza na deteção do SET. Com isso, obtém-se uma estimativa do número de transistores que pode ser monitorado pelos Bulk-BICS. É proposta a estratégia de implementação dos Bulk-BICS na forma de uma standard cell a ser posicionada entre os grupos de transistores sob monitoração, e uma estimativa da relação entre as áreas dos transistores monitorados e do Bulk-BICS é apresentada. Por fim, é estudada a questão da fabricação dos Bulk-BICS no mesmo substrato dos transistores monitorados e uma maneira de fazê-la é proposta. Os resultados encontrados permitem definir a viabilidade e a eficácia da técnica Bulk-BICS como forma de deteção de eventos transientes em sistemas digitais. / A current sensor to detect the occurrence of a single-event transient that is caused by the incidence of ionizing radiation in an integrated circuit is presented. Radiation of interest and their effects on the integrated circuits are discussed. Fundamentals of the Bulk-BICS technique and the circuits proposed in the literature to implement this technique are discussed and evaluated, with emphasis on the dynamic memory cell-based circuit DynBICS, which was developed as a previous work and with fabricated samples available. Experimental results obtained from a series of electrical tests, a TID test, and a laser-stimulated test that were conducted on a number of fabricated and packaged samples are presented. The results confirm that the dynamic memory cell is suitable and robust enough to be used in Bulk-BICS circuits. Next, evolution of the dynamic memory cell into an integrative memory cell is discussed and the circuit of a Bulk-BICS using this new memory cell topology is presented. The electrical operation of this new sensor TRIBICS is evaluated using circuit simulations. By using double-exponential current pulses, both the sensitivity and the response time are determined. The static memory cell operation is analyzed and a comparison of performance between static and integrative cells is performed using a simplified model. The results show that the integrative memory cell is faster and more sensitive than the static cells used in three state-ofthe- art sensors published in literature Then the TRIBICS sensor is simulated connected to a TCAD-modeled device, comprising an inverter, which is used as a target for radiation impact. TCAD models are previously presented and the results obtained when the PMOS and NMOS transistors are separately excited by radiation show the formation of a conductive link between drain and source regions during the occurrence of SET. The simulations also show that the results obtained by using TCAD simulations do not agree with the ones obtained by using circuit simulation regarding the current share among drain, source and bulk during the SET. Mixed-mode simulations using the TCAD models in conjunction of TRIBICS circuits described in SPICE show the relationship between LET and the effective SET-detection with the inter-tap distance as a parameter, and allows to determine the inter-tap distance for 100% of SET detection efficiency. Based on these results, an estimate of how many transistors can be monitored by the Bulk-BICS is obtained. It is proposed to implement the Bulk-BICS as a standard cell, to be positioned in between the standard cell that compose a digital circuit and the area overhead necessary to implant the sensors in a real circuit is estimated. The problem on how to manufacture the Bulk-BICS circuit in the same substrate of the monitored transistors is studied and a solution is proposed. The results show the viability and effectiveness of the Bulk-BICS technique, as a means to detect single-event transients in digital systems.

As the efficiency potential for the industrial P-type Al-BSF silicon solar cell reaches its limit, new solar cell technologies are required to continue the pursuit of higher efficiency solar power at lower cost. It has been demonstrated in literature that among possible alternative solar cell structures, cells featuring a local BSF (LBSF) have demonstrated some of the highest efficiencies seen to date. Implementation of this technology in industry, however, has been limited due to the cost involved in implementing the photolithography procedures required. Recent advances in solar cell doping techniques, however, have identified ion implantation as a possible means of performing the patterned doping required without the need for photolithography. In addition, past studies have examined the potential for building solar cells on N-type silicon substrates, as opposed to P-type. Among other advantages, it is possible to create N-type solar cells which do not suffer from the efficiency degradation under light exposure that boron-doped P-type solar cells are subject to. Industry has not been able to capitalize on this potential for improved solar cell efficiency, in part because the fabrication of an N-type solar cell requires additional masking and doping steps compared to the P-type solar cell process. Again, however, recent advances in ion implantation for solar cells have demonstrated the possibility for bypassing these process limitations, fabricating high efficiency N-type cells without any masking steps. It is clear that there is potential for ion implantation to revolutionize solar cell manufacturing, but it is uncertain what absolute efficiency gains may be achieved by moving to such a process. In addition to development of a solar specific ion implant process, a number of new thermal processes must be developed as well. With so many parameters to optimize, it is highly beneficial to have an advanced simulation model which can describe the ion implant, thermal processes, and cell performance accurately. Toward this goal, the current study develops a process and device simulation model in the Sentaurus TCAD framework, and calibrates this model to experimentally measured cells. The study focuses on three main tasks in this regard: Task I - Implant and Anneal Model Development and Validation This study examines the literature in solar and microelectronics research to identify features of ion implant and anneal processes which are pertinent to solar cell processing. It is found that the Monte Carlo ion implant models used in IC fabrication optimization are applicable to solar cell manufacture, with adjustments made to accommodate for the fact that solar cell wafers are often pyramidally textured instead of polished. For modeling the thermal anneal processes required after ion implant, it is found that the boron and phosphorus cases need to be treated separately, with their own diffusion models. In particular, boron anneal simulation requires accurate treatment of boron-interstitial clusters (BICs), transient enhanced diffusion, and dose loss. Phosphorus anneal simulation requires treatment of vacancy and interstitial mediated diffusion, as well as dose loss and segregation. The required models are implemented in the Sentaurus AdvancedModels package, which is used in this study. The simulation is compared to both results presented in literature and physical measurements obtained on wafers implanted at the UCEP. It is found that good experimental agreement may be obtained for sheet resistance simulations of implanted wafers, as well as simulations of boron doping profile shape. The doping profiles of phosphorus as measured by the ECV method, however, contain inconsistencies with measured sheet resistance values which are not explained by the model. Task II - Device Simulation Development and Calibration This study also develops a 3D model for simulation of an N-type LBSF solar cell structure. The 3D structure is parametrized in terms of LBSF dot width and pitch, and an algorithm is used to generate an LBSF structure mesh with this parametrization. Doping profiles generated by simulations in Task I are integrated into the solar cell structure. Boundary conditions and free electrical parameters are calibrated using data from similar solar cells fabricated at the UCEP, as well as data from lifetime test wafers. This simulation uses electrical models recommended in literature for solar cell simulation. It is demonstrated that the 3D solar cell model developed for this study accurately reproduces the performance of an implanted N-type full BSF solar cell, and all parameters fall within ranges expected from theoretical calculations. The model is then used to explore the parameter space for implanted N-type local BSF solar cells, and to determine conditions for optimal solar cell performance. It is found that adding an LBSF to the otherwise unchanged baseline N-type cell structure can produce almost 1% absolute efficiency gain. An optimum LBSF dot pitch of 450um at a dot size of 100um was identified through simulation. The model also reveals that an LBSF structure can reduce the fill factor of the solar cell, but this effect can be offset by a gain in Voc. Further efficiency improvements may be realized by implementing a doping-dependent SRV model and by optimizing the implant dose and thermal anneal. Task III - Development of a Procedure for Ion Implanted N-type LBSF Cell Fabrication Finally, this study explores a method for fabrication of ion-implanted N-type LBSF solar cells which makes use of photolithographically defined nitride masks to perform local phosphorus implantation. The process utilizes implant, anneal, and metallization steps previously developed at the UCEP, as well as new implant masking steps developed in the course of this study. Although an LBSF solar cell has not been completely fabricated, the remaining steps of the process are successfully tested on implanted N-type full BSF solar cells, with efficiencies reaching 20.0%.

abstract: The thesis focuses on cost-efficient integration of the electro-chemical residue sensor (ECRS), a novel sensor developed for the in situ and real-time measurement of the residual impurities left on the wafer surface and in the fine structures of patterned wafers during typical rinse processes, and wireless transponder circuitry that is based on RFID technology. The proposed technology uses only the NMOS FD-SOI transistors with amorphous silicon as active material with silicon nitride as a gate dielectric. The proposed transistor was simulated under the SILVACO ATLAS Simulation Framework. A parametric study was performed to study the impact of different gate lengths (6 μm to 56 μm), electron motilities (0.1 cm2/Vs to 1 cm2/Vs), gate dielectric (SiO2 and SiNx) and active materials (a-Si and poly-Si) specifications. Level-1 models, that are accurate enough to acquire insight into the circuit behavior and perform preliminary design, were successfully constructed by analyzing drain current and gate to node capacitance characteristics against drain to source and gate to source voltages. Using the model corresponding to SiNx as gate dielectric, a-Si:H as active material with electron mobility equal to 0.4 cm2/V-sec, an operational amplifier was designed and was tested in unity gain configuration at modest load-frequency specifications. / Dissertation/Thesis / M.S. Electrical Engineering 2010

Este trabalho apresenta o desenvolvimento de um sensor de corrente transiente destinado a detectar a ocorrência de um evento transiente causado pela incidência de radiação ionizante em um circuito integrado. Iniciando com uma descrição dos efeitos da radiação sobre os circuitos integrados e dos tipos de radiação de interesse, os fundamentos da técnica Bulk- BICS são apresentados e as propostas existentes na literatura são expostas e avaliadas, com ênfase no sensor que utiliza a célula de memória dinâmica DynBICS, resultado de um trabalho prévio e do qual se dispõe de amostras fabricadas. Sobre essas amostras são efetuados testes elétricos, um ensaio de dose total irradiada TID e um ensaio de estimulação laser, cujos resultados são apresentados e confirmam a funcionalidade da topologia da célula de memória dinâmica aplicada a circuitos Bulk-BICS. Em seguida, é apresentada a topologia da célula de memória integrativa como uma evolução da célula de memória dinâmica e propõe-se o circuito de um novo sensor Bulk-BICS baseado na nova célula. O funcionamento elétrico do circuito desse novo sensor TRIBICS é avaliado através de simulação de circuitos determinando-se a sensibilidade e o tempo de resposta do sensor utilizando-se pulsos de corrente em dupla exponencial. É feita uma análise do funcionamento da célula de memória estática e, através de uma comparação de desempenho entre as células de memória estáticas utilizadas em três circuitos propostos e a célula de memória integrativa, utilizando um modelo simplificado, mostra-se que a célula de memória integrativa é mais rápida e sensível do que as contrapartes estáticas O sensor TRIBICS é então simulado em conexão com um modelo de dispositivo, sendo antes apresentados os modelos TCAD do inversor utilizado como alvo da incidência da radiação nas simulações. São apresentados resultados obtidos individualmente para o transistor NMOS e para o transistor PMOS, nos quais se mostra a formação de um canal condutivo entre dreno e fonte durante o SET. Mostra-se, também, que os resultados obtidos com a simulação de dispositivos não concorda com aqueles proporcionados pela simulação de circuitos no tocante à divisão das correntes transitórias entre dreno, fonte e substrato. O resultado das simulações de dispositivo efetuadas com os modelos TCAD em modo misto com o circuito TRIBICS descrito em SPICE mostram a relação entre a transferência de energia da irradiação LET e a efetiva deteção do SET provocado, em função da distância entre os contatos de bulk ou substrato, permitindo determinar a máxima distância entre contatos para 100% de certeza na deteção do SET. Com isso, obtém-se uma estimativa do número de transistores que pode ser monitorado pelos Bulk-BICS. É proposta a estratégia de implementação dos Bulk-BICS na forma de uma standard cell a ser posicionada entre os grupos de transistores sob monitoração, e uma estimativa da relação entre as áreas dos transistores monitorados e do Bulk-BICS é apresentada. Por fim, é estudada a questão da fabricação dos Bulk-BICS no mesmo substrato dos transistores monitorados e uma maneira de fazê-la é proposta. Os resultados encontrados permitem definir a viabilidade e a eficácia da técnica Bulk-BICS como forma de deteção de eventos transientes em sistemas digitais. / A current sensor to detect the occurrence of a single-event transient that is caused by the incidence of ionizing radiation in an integrated circuit is presented. Radiation of interest and their effects on the integrated circuits are discussed. Fundamentals of the Bulk-BICS technique and the circuits proposed in the literature to implement this technique are discussed and evaluated, with emphasis on the dynamic memory cell-based circuit DynBICS, which was developed as a previous work and with fabricated samples available. Experimental results obtained from a series of electrical tests, a TID test, and a laser-stimulated test that were conducted on a number of fabricated and packaged samples are presented. The results confirm that the dynamic memory cell is suitable and robust enough to be used in Bulk-BICS circuits. Next, evolution of the dynamic memory cell into an integrative memory cell is discussed and the circuit of a Bulk-BICS using this new memory cell topology is presented. The electrical operation of this new sensor TRIBICS is evaluated using circuit simulations. By using double-exponential current pulses, both the sensitivity and the response time are determined. The static memory cell operation is analyzed and a comparison of performance between static and integrative cells is performed using a simplified model. The results show that the integrative memory cell is faster and more sensitive than the static cells used in three state-ofthe- art sensors published in literature Then the TRIBICS sensor is simulated connected to a TCAD-modeled device, comprising an inverter, which is used as a target for radiation impact. TCAD models are previously presented and the results obtained when the PMOS and NMOS transistors are separately excited by radiation show the formation of a conductive link between drain and source regions during the occurrence of SET. The simulations also show that the results obtained by using TCAD simulations do not agree with the ones obtained by using circuit simulation regarding the current share among drain, source and bulk during the SET. Mixed-mode simulations using the TCAD models in conjunction of TRIBICS circuits described in SPICE show the relationship between LET and the effective SET-detection with the inter-tap distance as a parameter, and allows to determine the inter-tap distance for 100% of SET detection efficiency. Based on these results, an estimate of how many transistors can be monitored by the Bulk-BICS is obtained. It is proposed to implement the Bulk-BICS as a standard cell, to be positioned in between the standard cell that compose a digital circuit and the area overhead necessary to implant the sensors in a real circuit is estimated. The problem on how to manufacture the Bulk-BICS circuit in the same substrate of the monitored transistors is studied and a solution is proposed. The results show the viability and effectiveness of the Bulk-BICS technique, as a means to detect single-event transients in digital systems.

Este trabalho apresenta o desenvolvimento de um sensor de corrente transiente destinado a detectar a ocorrência de um evento transiente causado pela incidência de radiação ionizante em um circuito integrado. Iniciando com uma descrição dos efeitos da radiação sobre os circuitos integrados e dos tipos de radiação de interesse, os fundamentos da técnica Bulk- BICS são apresentados e as propostas existentes na literatura são expostas e avaliadas, com ênfase no sensor que utiliza a célula de memória dinâmica DynBICS, resultado de um trabalho prévio e do qual se dispõe de amostras fabricadas. Sobre essas amostras são efetuados testes elétricos, um ensaio de dose total irradiada TID e um ensaio de estimulação laser, cujos resultados são apresentados e confirmam a funcionalidade da topologia da célula de memória dinâmica aplicada a circuitos Bulk-BICS. Em seguida, é apresentada a topologia da célula de memória integrativa como uma evolução da célula de memória dinâmica e propõe-se o circuito de um novo sensor Bulk-BICS baseado na nova célula. O funcionamento elétrico do circuito desse novo sensor TRIBICS é avaliado através de simulação de circuitos determinando-se a sensibilidade e o tempo de resposta do sensor utilizando-se pulsos de corrente em dupla exponencial. É feita uma análise do funcionamento da célula de memória estática e, através de uma comparação de desempenho entre as células de memória estáticas utilizadas em três circuitos propostos e a célula de memória integrativa, utilizando um modelo simplificado, mostra-se que a célula de memória integrativa é mais rápida e sensível do que as contrapartes estáticas O sensor TRIBICS é então simulado em conexão com um modelo de dispositivo, sendo antes apresentados os modelos TCAD do inversor utilizado como alvo da incidência da radiação nas simulações. São apresentados resultados obtidos individualmente para o transistor NMOS e para o transistor PMOS, nos quais se mostra a formação de um canal condutivo entre dreno e fonte durante o SET. Mostra-se, também, que os resultados obtidos com a simulação de dispositivos não concorda com aqueles proporcionados pela simulação de circuitos no tocante à divisão das correntes transitórias entre dreno, fonte e substrato. O resultado das simulações de dispositivo efetuadas com os modelos TCAD em modo misto com o circuito TRIBICS descrito em SPICE mostram a relação entre a transferência de energia da irradiação LET e a efetiva deteção do SET provocado, em função da distância entre os contatos de bulk ou substrato, permitindo determinar a máxima distância entre contatos para 100% de certeza na deteção do SET. Com isso, obtém-se uma estimativa do número de transistores que pode ser monitorado pelos Bulk-BICS. É proposta a estratégia de implementação dos Bulk-BICS na forma de uma standard cell a ser posicionada entre os grupos de transistores sob monitoração, e uma estimativa da relação entre as áreas dos transistores monitorados e do Bulk-BICS é apresentada. Por fim, é estudada a questão da fabricação dos Bulk-BICS no mesmo substrato dos transistores monitorados e uma maneira de fazê-la é proposta. Os resultados encontrados permitem definir a viabilidade e a eficácia da técnica Bulk-BICS como forma de deteção de eventos transientes em sistemas digitais. / A current sensor to detect the occurrence of a single-event transient that is caused by the incidence of ionizing radiation in an integrated circuit is presented. Radiation of interest and their effects on the integrated circuits are discussed. Fundamentals of the Bulk-BICS technique and the circuits proposed in the literature to implement this technique are discussed and evaluated, with emphasis on the dynamic memory cell-based circuit DynBICS, which was developed as a previous work and with fabricated samples available. Experimental results obtained from a series of electrical tests, a TID test, and a laser-stimulated test that were conducted on a number of fabricated and packaged samples are presented. The results confirm that the dynamic memory cell is suitable and robust enough to be used in Bulk-BICS circuits. Next, evolution of the dynamic memory cell into an integrative memory cell is discussed and the circuit of a Bulk-BICS using this new memory cell topology is presented. The electrical operation of this new sensor TRIBICS is evaluated using circuit simulations. By using double-exponential current pulses, both the sensitivity and the response time are determined. The static memory cell operation is analyzed and a comparison of performance between static and integrative cells is performed using a simplified model. The results show that the integrative memory cell is faster and more sensitive than the static cells used in three state-ofthe- art sensors published in literature Then the TRIBICS sensor is simulated connected to a TCAD-modeled device, comprising an inverter, which is used as a target for radiation impact. TCAD models are previously presented and the results obtained when the PMOS and NMOS transistors are separately excited by radiation show the formation of a conductive link between drain and source regions during the occurrence of SET. The simulations also show that the results obtained by using TCAD simulations do not agree with the ones obtained by using circuit simulation regarding the current share among drain, source and bulk during the SET. Mixed-mode simulations using the TCAD models in conjunction of TRIBICS circuits described in SPICE show the relationship between LET and the effective SET-detection with the inter-tap distance as a parameter, and allows to determine the inter-tap distance for 100% of SET detection efficiency. Based on these results, an estimate of how many transistors can be monitored by the Bulk-BICS is obtained. It is proposed to implement the Bulk-BICS as a standard cell, to be positioned in between the standard cell that compose a digital circuit and the area overhead necessary to implant the sensors in a real circuit is estimated. The problem on how to manufacture the Bulk-BICS circuit in the same substrate of the monitored transistors is studied and a solution is proposed. The results show the viability and effectiveness of the Bulk-BICS technique, as a means to detect single-event transients in digital systems.

<p dir="ltr">This work introduces an innovative algorithm for co-simulating time-dependent Drift Diffusion (DD) equations with Maxwell\textquotesingle s equations to characterize semiconductor devices. Traditionally, the DD equations, derived from the Boltzmann transport equations, are used alongside Poisson\textquotesingle s equation to model electronic carriers in semiconductors. While DD equations coupled with Poisson\textquotesingle s equation underpin commercial TCAD software for micron-scale device simulation, they are limited by electrostatic assumptions and fail to capture time dependent high-frequency effects. Maxwell\textquotesingle s equations are fundamental to classical electrodynamics, enabling the prediction of electrical performance across frequency range crucial to advanced device fabrication and design. However, their integration with DD equations has not been studied thoroughly. The proposed method advances current simulation techniques by introducing a new broadband patch-based method to solve time-domain 3-D Maxwell\textquotesingle s equations and integrating it with the solution of DD equations. This technique is free of the low-frequency breakdown issues prevalent in conventional full-wave simulations. Meanwhile, it enables large-scale simulations with reduced computational complexity. This work extends the simulation to encompass the complete device, including metal contacts and interconnects. Thus, it captures the entire electromagnetic behavior, which is especially critical in electrically larger systems and high-frequency scenarios. The electromagnetic interactions of the device with its contacts and interconnects are investigated, providing insights into performance at the chip level. Validation through numerical experiments and comparison with results from commercial TCAD tools confirm the effectiveness of the proposed method. </p>