- About
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The Global ETD Search service is a free service for researchers
to find electronic theses and dissertations. This service is
provided by the
Networked Digital Library of Theses and Dissertations.
Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
Search results
Showing 1 to 8 of 8 (0.086 seconds)Spelling suggestions: "subject:"programmverifikation"" "subject:"reichweiteverifikation""
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Formal sequential equivalence checking of digital systems by symbolic simulationRitter, Gerd. January 2001 (has links) (PDF)
Darmstadt, Techn. Univ., Diss., 2001. / Computerdatei im Fernzugriff.
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| 2 |
Formal sequential equivalence checking of digital systems by symbolic simulationRitter, Gerd. January 2001 (has links) (PDF)
Darmstadt, Techn. Univ., Diss., 2001. / Computerdatei im Fernzugriff.
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| 3 |
Formal sequential equivalence checking of digital systems by symbolic simulationRitter, Gerd. January 2001 (has links) (PDF)
Darmstadt, Techn. University, Diss., 2001.
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| 4 |
Binäre Expression-DiagrammeHett, Andreas. Unknown Date (has links) (PDF)
Universiẗat, Diss., 2002--Freiburg (Breisgau).
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| 5 |
Speeding up hardware verification by automated data path scalingJohannsen, Peer. Unknown Date (has links) (PDF)
University, Diss., 2002--Kiel.
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| 6 |
Formal verification of pipelined microprocessorsKröning, Daniel. Unknown Date (has links) (PDF)
University, Diss., 2001--Saarbrücken.
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| 7 |
Formale Verifikation digitaler Systeme mit PetrinetzenSchober, Torsten. Unknown Date (has links) (PDF)
Universiẗat, Diss., 2003--Jena.
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| 8 |
Formal verification of a fully IEEE compliant floating point unitJacobi, Christian. Unknown Date (has links) (PDF)
University, Diss., 2002--Saarbrücken.
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