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Geometric programming and signal flow graph assisted design of interconnect and analog circuits張永泰, Cheung, Wing-tai. January 2007 (has links)
published_or_final_version / abstract / Electrical and Electronic Engineering / Master / Master of Philosophy
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Applying Agile methodologies within the context of traditional project governance : - A study of the Volvo Group experienceAzizi, Nima, Taqi, Mohammed Aysar January 2015 (has links)
The nature of software development has changed in last decade. Waterfall or traditional command and control methods have been replaced by Agile methodologies. Agile came as a “solution” to the disadvantages of the waterfall methodology, but using Agile has its own challenges. Due to the attractive characteristics of Agile such as flexibility and short time-to-market, Agile development has been increasingly popular and the number of organisations which have started to move to Agile is growing every day. Implementing new methodologies in any organisation is always a big challenge, especially for large-scale organisations due to their complexity, many different interacting interfaces, strong organisational culture, etc. The nature of these challenges and obstacles changes from different perspectives within an organisation, and each of these perspectives needs to be studied and investigated to ensure a successful transition from traditional approaches to Agile. In this thesis we focus on the project manager and project governance perspectives. We aim to define the success and failure factors that play a key role in moving from traditional approaches to Agile approaches in large-scale organisations. To address these challenges we conducted literature reviews on the latest research in implementing Agile methodologies. To collect our data we used a combination of qualitative and quantitative research methods. We explored both IT project manager and Chief project manager opinions and experiences of the organisations by conducting interviews and questionnaires in our research. The results reveals the difficulty to find proper product owners in the Agile projects. It is challenging to set a product owner who has Agile knowledge and is expert in the project domain. Specialized training and coaching for product owners is mentioned as one of the solutions that could be provided for this challenge. “Distributed teams”, “Lack of focus on the business side” and “Weak coaching and support” are some of the other critical areas which have been presented by the participants in the interviews and survey in this study. The main conclusion is that in order to have a successful transition to Agile approaches, the Agile mind-set should be set in all different part in an organizations, not only the development side and also that everyone have to understand “Why” Agile is beneficial. Also the communication of lessons learnt and feedback should be strong and effective in order to avoid repetition of the same mistakes. In addition, specialized training and coaching for different roles within the period of the development is necessary to ensure the successful adoption of Agile. / Synen på mjukvaruutveckling har förändrats under det senaste decenniet; Vattenfalls- eller traditionella kommando- och styrmetoder har ersatts av Agila metoder. Agila utvecklingsmetoder kom som en "lösning" till nackdelarna med vattenfalls metodiken, men användning av Agila metoder har sina egna utmaningar. På grund av Agila metoders attraktiva egenskaper såsom flexibilitet och kort tid till marknaden, har denna typ av utveckling blivit alltmer populärt och antalet organisationer som har börjat flytta till Agila metoder växer varje dag. Att genomföra nya metoder i en organisation är alltid en stor utmaning. Särskilt för stora organisationer på grund av deras komplexitet, med tanke på många olika samverkande gränssnitt, stark organisationskultur, etc. Karaktären på dessa utmaningar och hinder ändras från olika perspektiv inom en organisation, och vart och ett av dessa perspektiv behöver studeras och undersökas för att säkerställa en framgångsrik övergång från traditionella metoder till Agila metoder. I denna avhandling fokuserar vi på projektledare och projektförvaltningsperspektiv. Vi strävar efter att definiera framgångs- och misslyckande faktorer som spelar en nyckelroll i att flytta från traditionella metoder till Agila metoder i storskaliga organisationer. För att möta dessa utmaningar genomfört vi dessutom en litteraturstudie av den senaste forskningen om införande av Agila metoder. För att samla våra data vi använt en kombination av kvalitativa och kvantitativa forskningsmetoder. Vi utforskade både projektledare för IT och chefs-projektledare sidor av organisationer genom intervjuer och enkäter i vår forskning. Resultaten visar den kritiska roll produktägare utgör i Agila projekt. Det är en utmaning att tillsätta en korrekt produktägaren som har Agile kunskap och är expert i projektet domänen. Specialiserad utbildning och coaching för produktägare nämns som en av de möjliga lösningar som finns för denna utmaning. "distribuerade team", "brist på fokus på affärssidan" och "Svag coachning och support" är några av de andra viktiga områden som har lagts fram av deltagarna i intervjuerna och undersökning i denna studie. Den viktigaste slutsatsen är att för att få en lyckad övergång till Agila metoder bör Agilt tänkande tillämpas i alla delar i en organisations, inte bara utvecklingssidan, utan alla måste förstå "varför" Agila metoder är fördelaktigt. Även överföring av lärdomar och återkoppling bör vara stark och effektiv för att undvika återkommande samma misstag. Dessutom, specialiserad utbildning och coaching för olika roller och inom den tidsfrist för utvecklingen är nödvändig för att säkerställa ett framgångsrikt antagande av Agila arbetsmetoder.
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Simulations of turbulent boundary layers with heat transferLi, Qiang January 2009 (has links)
No description available.
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S-parameter VLSI transmission line analysis.Cooke, Bradly James. January 1989 (has links)
This dissertation investigates the implementation of S-parameter based network techniques for the analysis of multiconductor, high speed VLSI integrated circuit and packaging interconnects. The S-parameters can be derived from three categories of input parameters: (1) lossy quasi-static R,L,C and G, (2) lossy frequency dependent (dispersive) R,L,C,G and (3) the propagation constants, Γ, the characteristic impedance, Z(c) and the conductor eigencurrents, I, derived from full wave analysis. The S-parameter network techniques developed allow for: the analysis of periodic waveform excitation, the incorporation of externally measured or calculated scattering parameter data and large system analysis through macro decomposition. The inclusion of non-linear terminations has also been developed.
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VLSI REALIZATION OF AHPL DESCRIPTIONS AS STORAGE LOGIC ARRAY.CHIANG, CHEN HUEI. January 1982 (has links)
A methodology for the automatic translation of a Hardware Description Language (HDL) formulation of a VLSI system to a structured array-type of target realization is the subject of this investigation. A particular combination of input HDL and target technology has been implemented as part of the exercise, and a detailed evaluation of the result is presented. The HDL used in the study is AHPL, a synchronous clock-mode language which accepts the description of the hardware at Register Transfer Level. The target technology selected is Storage Logic Array (SLA), an evolution of PLA concept. Use of the SLA has a distinct advantage, notably in the ability to sidestep the interconnection routing problem, an expensive and time-consuming process in normal IC design. Over the past years, an enormous amount of effort has gone into generation of layout from an interconnection list. This conventional approach seems to complicate the placement and routing processes in later stages. In this research project the major emphasis has therefore been on extracting relevant global information from the higher-level description to guide the subsequent placement and routing algorithms. This effectively generates the lower-level layout directly from higher-level description. A special version of AHPL compiler (stage 3) has been developed as part of the project. The SLA data structure formats and the implementation of the Data and Control Sections of the target are described in detail. Also the evaluation and possibilities for future research are discussed.
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VLSI REALIZATION OF AHPL DESCRIPTION AS SLA, PPLA, & ULA AND THEIR COMPARISONS (CAD).CHEN, DUAN-PING. January 1984 (has links)
Reducing circuit complexity to minimize design turnaround time and maximize chip area utilization is the most evident problem in dealing with VLSI layout. Three suggestions have been recommended to reduce circuit complexity. They are using regular modules as design targets, using hierarchical top-down design as a design methodology, and using CAD as a design tool. These three suggestions are the basis of this dissertation project. In this dissertation, three silicon compilers were implemented which take an universal AHPL circuit description as an input and automatically translate it into SLA (Storage Logic Array), PPLA (Path Programmable Logic Array), and ULA (Uncommitted Logic Array) chip layout. The goal is to study different layout algorithms and to derive better algorithms for alternative VLSI structures. In order to make a precise chip area comparison of these three silicon compilers, real SLA and ULA circuits have been designed. Four typical AHPL descriptions of different circuits or varying complexity were chosen as comparison examples. The result shows that the SLA layout requires least area for circuit realization generally. The PPLA approach is the worst one for large scale circuit realization, while the ULA lies in between.
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Thermal characterization of VLSI packagingShope, David Allen, 1958- January 1988 (has links)
With electronic packaging becoming more complex, simple hand methods to model the thermal performance of the package are insufficient. As computer aided modeling methods came into use, a test system was developed to verify the predictions produced by such modeling methods. The test system is evaluated for operation and performance. Further, the premise of this type of test (the accurate calibration of packaged temperature-sensitive-parameter devices can be done) is investigated using a series of comparative tests. From this information, causes of possible/probable errors in calibration are identified and related to the different methodologies and devices used. Finally, conclusions are presented regarding the further improvement of the test system and methodologies used in this type of testing.
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The evaluation of the PODEM algorithm as a mechanism to generate goal states for a sequential circuit test searchLee, Hoi-Ming Bonny, 1961- January 1988 (has links)
In a VLSI design environment, a more efficient test generation algorithm is definitely needed. This thesis evaluates a test generation algorithm, PODEM, as mechanism to generate the goal states in a sequential circuit test search system, SCIRTSS. First, a hardware description language, AHPL, is used to describe the behavior of a sequential circuit. Next, SCIRTSS is used to generate the test vectors. Several circuits are evaluated and experimental results are compared with data from a previous version of SCIRTSS which was implemented with the D-Algorithm. Depending on the number of reconvergent fanouts in a circuit, it is found that PODEM is 1 to 23 times faster than the D-Algorithm.
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Synaptic rewiring in neuromorphic VLSI for topographic map formationBamford, Simeon A. January 2009 (has links)
A generalised model of biological topographic map development is presented which combines both weight plasticity and the formation and elimination of synapses (synaptic rewiring) as well as both activity-dependent and -independent processes. The question of whether an activity-dependent process can refine a mapping created by an activity-independent process is investigated using a statistical approach to analysingmapping quality. The model is then implemented in custom mixed-signal VLSI. Novel aspects of this implementation include: (1) a distributed and locally reprogrammable address-event receiver, with which large axonal fan-out does not reduce channel capacity; (2) an analogue current-mode circuit for Euclidean distance calculation which is suitable for operation across multiple chips; (3) slow probabilistic synaptic rewiring driven by (pseudo-)random noise; (4) the application of a very-low-current design technique to improving the stability of weights stored on capacitors; (5) exploiting transistor non-ideality to implement partially weightdependent spike-timing-dependent plasticity; (6) the use of the non-linear capacitance of MOSCAP devices to compensate for other non-linearities. The performance of the chip is characterised and it is shown that the fabricated chips are capable of implementing the model, resulting in biologically relevant behaviours such as activity-dependent reduction of the spatial variance of receptive fields. Complementing a fast synaptic weight change mechanism with a slow synapse rewiring mechanism is suggested as a method of increasing the stability of learned patterns.
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Multi-layered Energy Conversion and Frequency Control in Complex Electric Power SystemsPopli, Nipun 01 May 2017 (has links)
The main performance objective in an electric power grid entails timely and efficient generation and delivery to the time-varying electricity demand. As the electricity industry is witnessing proliferation of the mainstream renewables, the minute-by-minute variations in wind and solar power generation may result in temporary electricity scarcity that jeopardizes grid stability and quality of service. The evolving electricity markets are aimed at incentivizing the conventional generators to reinforce their operating flexibility. This dissertation concerns the goal of enhancing the dynamic response rates of interconnected controllable resources by means of a multi-layered fuel input control of electrically coupled heterogeneous energy conversion components. Both power engineering and large-scale control contributions are made in support of this enhancement. First, improved fuel input controls are designed to enable flexible physics-based energy conversion dynamics required by the interconnected grid. To efficiently utilize the resources load-following and regulation problems are stated. The efficacy of proposed fuel input control designs in enhancing the dynamic response rates is illustrated on IEEE 14-bus system. Second, the problem is formalized as multi-input multioutput time-varying trajectory tracking based on a decentralized spatiotemporal composite control design. The concepts of vector-Lyapunov function and singular perturbation are invoked to formalize model decompositions, over space and time, respectively. Next, the assumptions for model simplifications are relaxed and the problem of parametric uncertainty is addressed. A minimumcost resilient co-design approach is introduced for storage-sensors-communication channels in a complex electric power grid. The notion of selective strong structural fixed modes is explored as a characterization of feasible decentralized control laws for an arbitrary system realization satisfying a pre-specified structure. Finally, it is proposed that planning of generation portfolio must be driven by the objective of maintaining adequate operating flexibility in the system. The goal is to ensure sufficient ramp capacity to sustain the significant integration of intermittent renewable resources.
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