61 |
Hot-carrier-induced instabilities in n-mosfet's with thermally nitrided oxide as gate dielectric馬志堅, Ma, Zhi-jian. January 1992 (has links)
published_or_final_version / Electrical and Electronic Engineering / Doctoral / Doctor of Philosophy
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Scaling limits and opportunities of double-gate MOSFETSChen, Qiang 05 1900 (has links)
No description available.
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A large-signal model for the RF power MOSFETBordelon, John H. 05 1900 (has links)
No description available.
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Distributed-channel bipolar device : experimentation, analytical modeling and applicationsJiang, Fenglai January 1994 (has links)
Thesis (Ph. D.)--University of Hawaii at Manoa, 1994. / Includes bibliographical references (leaves 593-597). / Microfiche. / 2 v. (xliii, 597 leaves), bound ill. 29 cm
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Hot carrier degradation of sub-micron n-channel MOSFETs subject to static stressAminzadeh, Payman G. 18 June 1993 (has links)
Hot carrier effects in sub-micron lightly doped drain (LDD) n-channel
MOSFETs under static (DC) stress are studied in order to establish the degradation
mechanisms of such devices. Degradation is monitored as a function of time at various
gate voltages. Under accelerated aging conditions (i.e. large drain voltages) the gate
voltage for maximum degradation is found to be different than the gate voltage for
which the substrate current is maximum; this is in contrast to the results of previous
workers who found degradation and substrate current to be strongly correlated.
However, under normal operating conditions, degradation and substrate current are
found to be correlated. Furthermore, through the use of charge pumping
measurements it is shown that two primary mechanisms are accountable for the
degradation of these devices at small and large gate voltages. First, at large gate
voltages there is an increase in the degradation which is predominantly due to electron
injection and trapping in the oxide. An alternating static injection experiment shows
that this type of electron trapping degradation is recoverable. Second, at small gate
voltages degradation is mainly related to interface state generation near the drain LDD
region. Floating gate measurements demonstrate that electron and hole injection occurs
at large and small gate voltages, respectively. It is also shown that maximum interface
state creation occurs when electron and hole injection happens simultaneously. / Graduation date: 1994
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Gate capacitance as a monitor for studying MOS transistor degradation by electrical stressing /Kiat, Ah Lian. Unknown Date (has links)
Thesis (MEng)--University of South Australia, 1995
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MOSFET RF characterization using bulk and SOI CMOS technologies /Saijets, Jan. January 1900 (has links) (PDF)
Thesis (doctoral)--Helsinki University of Technology, 2007. / Includes bibliographical references (p. 161-171). Also available on the World Wide Web.
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The degradation and time-dependent breakdown of p-type MOSFETS with a high-k dielectric /Yust, Brian. January 1900 (has links)
Thesis (M.S.)--Texas State University-San Marcos, 2008. / Vita. Includes bibliographical references (leaf 77). Also available on microfilm.
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69 |
A procedure to verify the accuracy of delivery of prescribed radiation doses in radiotherapy : a thesis submitted in partial fulfilment of the requirements for the degree of Master of Science in Medical Physics in the University of Canterbury /Peszynski, R. I. January 2008 (has links)
Thesis (M. Sc.)--University of Canterbury, 2008. / Typescript (photocopy). Includes bibliographical references (p. 87-89). Also available via the World Wide Web.
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A charge based power MOSFET model /Budihardjo, Irwan Kukuh. January 1995 (has links)
Thesis (Ph. D.)--University of Washington, 1995. / Vita. Includes bibliographical references (leaves [80]-83).
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