Recently, there is great interest in achieving higher-level integration, higher data rates, and reduced overall costs. At millimeter-wave (mm-wave) bands, the wavelength is small enough to realize an antenna-on-chip (AoC), which is an ideal solution for high compactness and lower costs. However, the main drawback of AoC is the low resistivity (10 Ω-cm) Si substrate used in the standard CMOS technology, which absorbs most radio-frequency (RF) power that was supposed to be radiated by the on-chip antenna. Moreover, due to the high relative permittivity (11.9) and relatively large electrical thickness of the Si, higher order surface wave modes get excited, which further degrade the antenna radiation performance. In order to alleviate the above-mentioned issues with the low gain of AoC, a combination of an artificial magnetic conductor (AMC) surface, a high dielectric constant superstrate, and a Fresnel lens is presented in this work. The AMC is realized in standard CMOS technology along with the AoC, whereas the superstrate and lens are part of a smart packaging solution. The AMC surface can change wave propagation characteristics at the operating frequency to achieve in-phase reflection, resulting in gain enhancement by reducing the loss in the substrate. The high dielectric constant superstrate behaves as an impedance transformer between the Si substrate and air, thus enhancing the coupling to air. Finally, the Fresnel lens enhances the gain by focusing the electromagnetic (EM) radiation beam at the boresight. For AoC realization, a standard 0.18 μm CMOS process was utilized. A coplanar waveguide (CPW) fed monopole on-chip antenna at 71 GHz, along with the corresponding driving circuit, was designed and fabricated. The AMC enhances the gain by 3 dB. Since the chip needs to be packaged anyways, in this work, we optimize the package to provide further gain enhancement. This smart package, comprising a superstrate and a Fresnel lens, provides a gain enhancement of 16 dB. The overall combination of the optimized AMC surface, superstrate layer, and lens package can provide a gain enhancement of around 19 dB. Furthermore, the package has been realized through additive manufacturing techniques that ensure lower costs for the overall system.

Yes / A novel 50μm Silicon-based on-chip antenna is presented that combines metamaterial (MTM) and substrate integrated waveguide (SIW) technologies for integration in THz circuits operating from 0.28 to 0.30 THz. The antenna structure comprises a square patch antenna implemented on a Silicon substrate with a ground-plane. Embedded diagonally in the patch are two T-shaped slots and the edges of the patch is short-circuited to the ground-plane with metal vias, which convert the structure into a substrate integrated waveguide. This structure reduces loss resulting from surface waves and Silicon dielectric substrate. The modes in the structure can be excited through two coaxial ports connected to the patch from the underside of the Silicon substrate. The proposed antenna structure is essentially transformed to exhibit metamaterial properties by realizing two T-shaped slots, which enlarges the effective aperture area of the miniature antenna and significantly enhances its impedance bandwidth and radiation characteristics between 0.28 THz to 0.3 THz. It has an average gain and efficiency of 4.5dBi and 65%, respectively. In addition, it is a self-isolated structure with high isolation of better than 30dB between the two ports. The on-chip antenna has dimensions of 800×800×60 μm3. / H2020-MSCA-ITN-2016 SECRET-722424 and the financial support from the UK Engineering and Physical Sciences Research Council (EPSRC) under grant EP/E0/22936/1

Ever growing demands for higher data rate and bandwidth are pushing extremely high data rate wireless applications to millimeter-wave band (30-300GHz), where sufficient bandwidth is available and high data rate wireless can be achieved without using complex modulation schemes. In addition to the communication applications, millimeter-wave band has enabled novel short range and long range radar sensors for automotive as well as high resolution imaging systems for medical and security. Small size, high gain antennas, unlicensed and worldwide availability of released bands for communication and a number of other applications are other advantages of the millimeter-wave band. The major obstacle for the wide deployment of commercial wireless and radar systems in this frequency range is the high cost and bulky nature of existing GaAs- and InP-based solutions. In recent years, with the rapid scaling and development of the silicon-based integrated circuit technologies such as CMOS and SiGe, low cost technologies have shown acceptable millimeter-wave performance, which can enable highly integrated millimeter-wave radio devices and reduce the cost significantly. Furthermore, at this range of frequencies, on-chip antenna becomes feasible and can be considered as an attractive solution that can further reduce the cost and complexity of the radio package. The propagation channel challenges for the realization of low cost and reliable silicon-based communication devices at millimeter-wave band are severe path loss as well as shadowing loss of human body. Silicon technology challenges are low-Q passive components, low breakdown voltage of active devices, and low efficiency of on-chip antennas. The main objective of this thesis is to investigate and to develop antenna and front-end for cost-effective silicon based millimeter-wave phased array radio architectures that can address above challenges for short range, high data rate wireless communication as well as radar applications. Although the proposed concepts and the results obtained in this research are general, as an important example, the application focus in this research is placed on the radio aspects of emerging 60 GHz communication system. For this particular but extremely important case, various aspects of the technology including standard, architecture, antenna options and indoor propagation channel at presence of a human body are studied. On-chip dielectric resonator antenna as a radiation efficiency improvement technique for an on-chip antenna on low resistivity silicon is presented, developed and proved by measurement. Radiation efficiency of about 50% was measured which is a significant improvement in the radiation efficiency of on-chip antennas. Also as a further step, integration of the proposed high efficiency antenna with an amplifier in transmit and receive configurations at 30 GHz is successfully demonstrated. For the implementation of a low cost millimeter-wave array antenna, miniaturized, and efficient antenna structures in a new integrated passive device technology using high resistivity silicon are designed and developed. Front-end circuit blocks such as variable gain LNA, continuous passive and active phase shifters are investigated, designed and developed for a 60GHz phased array radio in CMOS technology. Finally, two-element CMOS phased array front-ends based on passive and active phase shifting architectures are proposed, developed and compared.

Novel chip antennas having an attractive EMC¡]Electromagnetic Compatibility¡^property for WLAN¡]Wireless Local Area Network¡^operations are demonstrated in this thesis. With the EMC property, the proposed antennas are suitable to be applied as internal antennas in mobile communication devices, such as the smart phones or PDA¡]Personal Digital Assistant¡^phones. With the antenna ground portion functioning as a new ground structure, the EM fringing fields in the surrounding region of the proposed antennas are greatly reduced to be negligible. When the possible RF shielding metal case or other electronic components are placed close to the proposed antennas, the antenna performances are almost unaffected. In other words, the isolation distance between the antenna and the nearby components will be no long required. This can lead to a compact integration of the proposed antennas with the nearby components in mobile communication devices. Details of the measured and simulated results of the proposed EMC chip antennas are presented and discussed.

In this thesis, the study mainly focuses on developing multiband chip antennas for mobile handsets. Three possible solutions and their extended and integrated designs are presented. By using the dielectric material as the chip base, the chip antenna can be smaller in size and simpler in design. Most of the applications of the traditional chip antennas are rarely used as the mobile phone antenna and are commonly designed with a single operating band to cover GPS or WLAN operation only. Different types of the antennas are proposed in the thesis. The metal patterns of the monopole and loop antennas are manufactured inside the chip base with an occupied volume of generally less than 0.8 cc, some even as small as 0.3 cc. Electronic components like the lens of the embedded camera and the speaker can be integrated close to the chip antenna with little influences on the radiation characteristics. Consequently, the developed chip antennas are suitable for mobile communications and can cover not only GSM850/900/1800/1900/ UMTS bands but also WLAN/WiMAX bands.

Nowadays, there is a growing demand for high frequency-bandwidth mm-wave (30-300 GHz) electronic wireless transceiver systems to support applications such as high data-rate wireless communication and high resolution imaging. Such mm-wave systems are becoming more feasible due to the extreme transistor downscaling in silicon-based integrated circuits, which enabled densely-integrated high-speed elec- tronics operating up to more than 100 GHz with low fabrication cost. To further enhance system integrability, it is required to implement all wireless system compo- nents on the chip. Presently, the last major barrier to true System-on-Chip (SoC) realization is the antenna implementation on the silicon chip. Although at mm-wave frequencies the antenna size becomes small enough to fit on chip, the antenna performance is greatly deteriorated due the high conductivity and high relative permittivity of the silicon substrate. The negative e↵ects of the silicon substrate could be avoided by using a metallic reflecting surface on top of silicon, which e↵ectively isolates the antenna from the silicon. However, this approach has the shortcoming of having to implement the antenna on the usually very thin silicon oxide layer of a typical CMOS fabrication process (10’s of μm). This forces the antenna to be in a very close proximity (less than one hundredth of a wavelength) to the reflecting surface. In this regime, the use of conventional metallic reflecting surface for silicon shielding has severe e↵ects on the antenna performance as it tends to reduce the antenna radiation resistance resulting in most of the energy being absorbed rather than radiated. In this work, the use of specially patterned reflecting surfaces for improving on- chip antenna performance is investigated. By using a periodic metallic surface on top of a grounded substrate, the structure can mimic the behavior of a perfect mag- netic conductor, hence called Artificial Magnetic Conductor (AMC) surface. Unlike conventional ground plane reflecting surfaces, AMC surfaces generally enhance the radiation and impedance characteristics of close-by antennas. Based on this property, a ring-based AMC reflecting surface has been designed in the oxide layer for on-chip antennas operating at 94 GHz. Furthermore, a folded dipole antenna with its associ- ated planar feeding structures has been optimized and integrated with the developed ring-based AMC surface. The proposed design is then fabricated at KAUST clean- room facilities. Prototype characterization showed very promising results with good correlation to simulations, with the antenna exhibiting an impedance bandwidth of 10% (90-100 GHz) and peak gain of -1.4 dBi, which is the highest gain reported for on-chip antennas at this frequency band without the use of any external o↵-chip components or post-fabrication steps.

Ever growing demands for higher data rate and bandwidth are pushing extremely high data rate wireless applications to millimeter-wave band (30-300GHz), where sufficient bandwidth is available and high data rate wireless can be achieved without using complex modulation schemes. In addition to the communication applications, millimeter-wave band has enabled novel short range and long range radar sensors for automotive as well as high resolution imaging systems for medical and security. Small size, high gain antennas, unlicensed and worldwide availability of released bands for communication and a number of other applications are other advantages of the millimeter-wave band. The major obstacle for the wide deployment of commercial wireless and radar systems in this frequency range is the high cost and bulky nature of existing GaAs- and InP-based solutions. In recent years, with the rapid scaling and development of the silicon-based integrated circuit technologies such as CMOS and SiGe, low cost technologies have shown acceptable millimeter-wave performance, which can enable highly integrated millimeter-wave radio devices and reduce the cost significantly. Furthermore, at this range of frequencies, on-chip antenna becomes feasible and can be considered as an attractive solution that can further reduce the cost and complexity of the radio package. The propagation channel challenges for the realization of low cost and reliable silicon-based communication devices at millimeter-wave band are severe path loss as well as shadowing loss of human body. Silicon technology challenges are low-Q passive components, low breakdown voltage of active devices, and low efficiency of on-chip antennas. The main objective of this thesis is to investigate and to develop antenna and front-end for cost-effective silicon based millimeter-wave phased array radio architectures that can address above challenges for short range, high data rate wireless communication as well as radar applications. Although the proposed concepts and the results obtained in this research are general, as an important example, the application focus in this research is placed on the radio aspects of emerging 60 GHz communication system. For this particular but extremely important case, various aspects of the technology including standard, architecture, antenna options and indoor propagation channel at presence of a human body are studied. On-chip dielectric resonator antenna as a radiation efficiency improvement technique for an on-chip antenna on low resistivity silicon is presented, developed and proved by measurement. Radiation efficiency of about 50% was measured which is a significant improvement in the radiation efficiency of on-chip antennas. Also as a further step, integration of the proposed high efficiency antenna with an amplifier in transmit and receive configurations at 30 GHz is successfully demonstrated. For the implementation of a low cost millimeter-wave array antenna, miniaturized, and efficient antenna structures in a new integrated passive device technology using high resistivity silicon are designed and developed. Front-end circuit blocks such as variable gain LNA, continuous passive and active phase shifters are investigated, designed and developed for a 60GHz phased array radio in CMOS technology. Finally, two-element CMOS phased array front-ends based on passive and active phase shifting architectures are proposed, developed and compared.

No description available.

No / This letter investigates the feasibility of designing a high gain on-chip antenna on silicon technology for subterahertz applications over a wide-frequency range. High gain is achieved by exciting the antenna using an aperture fed mechanism to couple electromagnetics energy from a metal slot line, which is sandwiched between the silicon and polycarbonate substrates, to a 15-element array comprising circular and rectangular radiation patches fabricated on the top surface of the polycarbonate layer. An open ended microstrip line, which is orthogonal to the metal slot-line, is implemented on the underside of the silicon substrate. When the open ended microstrip line is excited it couples the signal to the metal slot-line which is subsequently coupled and radiated by the patch array. Measured results show the proposed on-chip antenna exhibits a reflection coefficient of less than-10 dB across 0.290-0.316 THz with a highest gain and radiation efficiency of 11.71 dBi and 70.8%, respectively, occurred at 0.3 THz. The antenna has a narrow stopband between 0.292 and 0.294 THz. The physical size of the presented subterahertz on-chip antenna is 20 × 3.5 × 0.126 mm3.

Nowadays, as aging population increasing yearly, the health care technologies for elder people who commonly have high blood pressure or Glaucoma issues have attracted much attention. In order to care of those people, implantable integrated circuits (ICs) in human body are the direct solution to have 24/7 days monitoring with real-time data for diagnosis by patients themselves or doctors. However, due to the small size requirement for the implanted ICs located in human organs, it's quite challenging to integrate with transmitting and receiving antenna in a single chip, especially operating in 5.8-GHz ISM band. This research proposes a new idea to solve the issue of integrating an on-chip antenna with implanted ICs. By adding an additional dielectric substrate upon the layer of silicon oxide in CMOS technology, utilizing the metal-6, it can form an extremely compact 3D-structure on-chip antenna which is able to be placed in human eye, heart or even in a few mm-diameter vessels. The proposed 3D on-chip antenna is only 1x1x2.8 mm3 with -10 dB gain and 10% efficiency, which has capability to communicate at least within 5 cm distance. The entire implanted battery-less wireless system has also been developed in this research. A designed 30% efficiency Native NMOS rectifier could generate 1 V and 1 mA to supply the designed low power transmitter including voltage-controlled oscillator (VCO) and power amplifier (PA). The entire system performance is well evaluated by link budget analysis and the simulation result demonstrates the possibility and feasibility of future on-demand easy-to-design implantable SoC.