A unique all-optical 1x2 self-routed switch is introduced. This switch routes an optical packet from one input to one of two possible outputs. The header and payload are transmitted separately in the system, and the header bits are processed in parallel thus increasing the switching speed as well as reducing the amount of buffering required for the payload. A 1x2 switching operation is analysed and a switching ratio of up to 14dB is obtained. The objective of the research was to investigate a unique all-optical switch. The switch works by processing the optical bits in a header packet which contains the destination address for a payload packet. After the destination address is processed the optical payload packet gets switched to one of two outputs depending on the result of the optical header processing. All-optical packet switching in the optical time domain was accomplished by making use of all-optical parallel processing of an optical packet header. This was demonstrated in experiments in which a three bit parallel processing all-optical switching node was designed, simulated and used to successfully demonstrate the concept. The measure of success that was used in the simulated experiments was the output switching ratio, which is the ratio between the peak optical power of a high bit at the first output and the peak optical power of a high bit at the second output. In all experimental results the worst case scenario was looked at, which means that if there was any discrepancy in the peak value of the output power then the measurement’s minimum/maximum value was used that resulted in a minimum value for the switching ratio. The research resulted in an optical processing technique which took an optical bit sequence and delivered a single output result which was then used to switch an optical payload packet. The packet switch node had two optical fibre inputs and two optical fibre outputs. The one input fibre carried the header packet and the other input fibre carried the payload packet. The aim was to switch the payload packet to one of the two output fibres depending on the bit sequence within the header packet. Also only one unique address (header bit sequence) caused the payload packet to exit via one of the outputs and all the other possible addresses caused the payload packet to exit via the other output. The physical configuration of the all-optical switches in the parallel processing structure of the switching node determined for which unique address the payload packet would exit via a different output than when the address was any of the other possible combinations of sequences. Only three Gaussian shaped bits were used in the header packet at a data rate of 10 Gbps and three Gaussian shaped bits in the payload packet at a data rate of 40 Gbps, but in theory more bits can be used in the payload packet at a decreased bit length to increase throughput. More bits can also be used in the header packet to increase the number of addresses that can be reached. In the simulated experiments it was found that the payload packet would under most circumstances exit both outputs, and at one output it would be much larger than at the other output (where it was normally found to be suppressed when compared to the other output’s optical power). The biggest advantage of this method of packet-switching is that it occurs all-optically, meaning that there is no optical to electronic back to optical conversions taking place in order to do header processing. All of the header processing is done optically. One of the disadvantages is that the current proposed structure of the all-optical switching node uses a Cross-Gain Modulator (XGM) switch which is rather expensive because of the Semiconductor Optical Amplifier (SOA). In this method of packet-switching the length of the payload packet cannot exceed the length of one bit of the header packet. This is because the header processing output is only one header bit length long and this output is used to switch the payload packet. Thus any section of the payload packet that is outside this header processing output window will not be switched correctly / Dissertation (MEng (Electronic Engineering))--University of Pretoria, 2007. / Electrical, Electronic and Computer Engineering / unrestricted

The goal of the Master's Thesis is to describe and analyze the current situation of the management system with regard to compliance of standard ČSN EN ISO 9001:2009 requirements at OFA Ltd. The result of the thesis will be used as basic information for implementation and subsequent certification of the quality management system at the company. The Master's Thesis contains improvement recommendations and suggestions oriented on quality management system at OFA Ltd. In the theoretical part is described the term quality and explain why quality is important nowadays. In that part are also mentioned some concrete quality management systems including the system of the international standard ISO 9001.

[pt] Esta dissertação tem como objetivo explorar as possibilidades de introdução de inteligência na camada física de uma Rede Óptica de Telecomunicações, visando a sua aplicação futura. A utilização de subportadoras de RF - introduzidas no domínio óptico através de moduladores Mach-Zehnder -, associada a tecnologias de múltiplo acesso óptico, permite a construção de mecanismos de proteção, restauração, endereçamento, qualidade de serviço e gerenciamento TMN, na camada física. A vantagem da solução proposta reside no aumento de velocidade de operação da rede, bem como na redução do custo e da complexidade de seu gerenciamento, uma vez que nesta configuração os pacotes de informação são abertos somente ao atingirem seu nó destino. Os resultados obtidos sugerem que esta configuração pode ser utilizada para a operação e o gerenciamento de toda uma rede óptica de altíssima velocidade. / [en] The objective of this work is to explore the possibilities of built-in intelligence embedded in the physical layer of an Optical Telecommunications Network, aiming at its future applications. The use of RF subcarriers - introduce above the optical payload through Mach-Zehnder modulators -, associated with multiple acess technologies, allows for protection, restoration, addressing, Quality of Service and TMN management network complexity and cost, while increasing its operational speed, since this approach allows data packages to be opened only when they reach their destination node. The results obtained suggest that this arrangement could be used for networking and management of ultra-high-speed optical systems.

No description available.

En este trabajo se realiza una intensiva labor teórica de descripción de sistemas de comunicaciones ópticas que utilizan la técnica de multiplexación por división de frecuencias ortogonales (OFDM en inglés), más concretamente en sistemas con modulación directa de la intensidad de un láser y detección directa. Se parte pues de un modelo analítico que estudia con detalle todos aquellos fenómenos que afectan a la señal de información detectada en el receptor. Tales fenómenos son: la nolinealidad del láser, las modulaciones de intensidad y de fase ópticas, la propagación a través de la fibra óptica teniendo en cuenta la dispersión cromática de primer orden, y la detección de intensidad óptica final mediante un detector de ley cuadrática. El modelo analítico es validado mediante comparaciones con resultados obtenidos a través de simulaciones con software comercial. Dada la característica singularidad de las señales OFDM debidas a su naturaleza multi-portadora, la amplitud de la señal generada es aleatoria, y el modelo analítico es complementado con un estudio que contempla el recorte o "clipping" en el transmisor. Además, se tiene en cuenta los efectos de filtrado de la señal a lo largo de sistema de comunicaciones. Con el trabajo analítico realizado se está en disposición de realizar una descripción bastante completa de los principales fenómenos y realizar estudios para evaluar el funcionamiento final ante diferentes valores de los parámetros del sistema. Es bien sabido que los sistemas de comunicaciones ópticas con modulación y detección directa se ven perjudicados por la distorsión no lineal, que para señales multi-portadora como OFDM se traduce en la mezcla de los símbolos de información que transportan las diferentes subportadoras. Para mitigar la distorsión no lineal y así mejorar el funcionamiento del sistema, se propone el uso de una técnica de pre-distorsión que se basa en el modelo analítico previamente propuesto. Esta técnica mejora la eficiencia de modulación, haciendo posible incrementar el término de la señal de información sin que se vea incrementada la distorsión no lineal en el receptor. La técnica aquí propuesta se compara también con otra ya publicada con el objetivo de evaluar su funcionamiento. Otra técnica para la mejora de sistemas con modulación y detección directas es la realizada mediante filtrado óptico. Aunque se conoce de forma más o menos intuitiva su funcionamiento para formatos de modulación ópticos tradicionales, es preciso disponer de una formulación matemática para señales ópticas OFDM para entender de forma exacta su principio de operación, las mejoras obtenidas, así como su potencial. En esta estapa se realiza esta formulación matemática ampliando el análisis teórico previamente propuesto, y se aplica para evaluar el funcionamiento obtenido con diversas estructuras de filtrado óptico. Finalmente, puesto que un potencial escenario de funcionamiento para señales ópticas OFDM son las redes de acceso donde operan más de un usuario, se propone y se estudia la técnica "interleaving division multiple access" (IDMA) en combinación con OFDM. / Sánchez Costa, C. (2014). Optical Orthogonal Frequency Division Multiplexed communication systems: analysis, design and optimization [Tesis doctoral]. Universitat Politècnica de València. https://doi.org/10.4995/Thesis/10251/39375

[ES] Los procesadores multinúcleo actuales cuentan con recursos compartidos entre los diferentes núcleos. Dos de estos recursos compartidos, la cache de último nivel y el ancho de banda de memoria principal, pueden convertirse en cuellos de botella para el rendimiento. Además, con el crecimiento del número de núcleos que implementan los diseños más recientes, la red dentro del chip también se convierte en un cuello de botella que puede afectar negativamente al rendimiento, ya que las redes tradicionales pueden encontrar limitaciones a su escalabilidad en el futuro cercano. Prácticamente la totalidad de los diseños actuales implementan jerarquías de memoria que se comunican mediante rápidas redes de interconexión. Esta organización es eficaz dado que permite reducir el número de accesos que se realizan a memoria principal y la latencia media de acceso a memoria. Las caches, la red de interconexión y la memoria principal, conjuntamente con otras técnicas conocidas como la prebúsqueda, permiten reducir las enormes latencias de acceso a memoria principal, limitando así el impacto negativo ocasionado por la diferencia de rendimiento existente entre los núcleos de cómputo y la memoria. Sin embargo, compartir los recursos mencionados es fuente de diferentes problemas y retos, siendo uno de los principales el manejo de la interferencia entre aplicaciones. Hacer un uso eficiente de la jerarquía de memoria y las caches, así como contar con una red de interconexión apropiada, es necesario para sostener el crecimiento del rendimiento en los diseños tanto actuales como futuros. Esta tesis analiza y estudia los principales problemas e inconvenientes observados en estos dos recursos: la cache de último nivel y la red dentro del chip. En primer lugar, se estudia la escalabilidad de las tradicionales redes dentro del chip con topología de malla, así como esta puede verse comprometida en próximos diseños que cuenten con mayor número de núcleos. Los resultados de este estudio muestran que, a mayor número de núcleos, el impacto negativo de la distancia entre núcleos en la latencia puede afectar seriamente al rendimiento del procesador. Como solución a este problema, en esta tesis proponemos una de red de interconexión óptica modelada en un entorno de simulación detallado, que supone una solución viable a los problemas de escalabilidad observados en los diseños tradicionales. A continuación, esta tesis dedica un esfuerzo importante a identificar y proponer soluciones a los principales problemas de diseño de las jerarquías de memoria actuales como son, por ejemplo, el sobredimensionado del espacio de cache privado, la existencia de réplicas de datos y rigidez e incapacidad de adaptación de las estructuras de cache. Aunque bien conocidos, estos problemas y sus efectos adversos en el rendimiento pueden ser evitados en procesadores de alto rendimiento gracias a la enorme capacidad de la cache de último nivel que este tipo de procesadores típicamente implementan. Sin embargo, en procesadores de bajo consumo, no existe la posibilidad de contar con tales capacidades y hacer un uso eficiente del espacio disponible es crítico para mantener el rendimiento. Como solución a estos problemas en procesadores de bajo consumo, proponemos una novedosa organización de jerarquía de dos niveles cache que utiliza una red de interconexión óptica. Los resultados obtenidos muestran que, comparado con diseños convencionales, el consumo de energía estática en la arquitectura propuesta es un 60% menor, pese a que los resultados de rendimiento presentan valores similares. Por último, hemos extendido la arquitectura propuesta para dar soporte tanto a aplicaciones paralelas como secuenciales. Los resultados obtenidos con la esta nueva arquitectura muestran un ahorro de hasta el 78 % de energía estática en la ejecución de aplicaciones paralelas. / [CA] Els processadors multinucli actuals compten amb recursos compartits entre els diferents nuclis. Dos d'aquests recursos compartits, la memòria d’últim nivell i l'ample de banda de memòria principal, poden convertir-se en colls d'ampolla per al rendiment. A mes, amb el creixement del nombre de nuclis que implementen els dissenys mes recents, la xarxa dins del xip també es converteix en un coll d'ampolla que pot afectar negativament el rendiment, ja que les xarxes tradicionals poden trobar limitacions a la seva escalabilitat en el futur proper. Pràcticament la totalitat dels dissenys actuals implementen jerarquies de memòria que es comuniquen mitjançant rapides xarxes d’interconnexió. Aquesta organització es eficaç ates que permet reduir el nombre d'accessos que es realitzen a memòria principal i la latència mitjana d’accés a memòria. Les caches, la xarxa d’interconnexió i la memòria principal, conjuntament amb altres tècniques conegudes com la prebúsqueda, permeten reduir les enormes latències d’accés a memòria principal, limitant així l'impacte negatiu ocasionat per la diferencia de rendiment existent entre els nuclis de còmput i la memòria. No obstant això, compartir els recursos esmentats és font de diversos problemes i reptes, sent un dels principals la gestió de la interferència entre aplicacions. Fer un us eficient de la jerarquia de memòria i les caches, així com comptar amb una xarxa d’interconnexió apropiada, es necessari per sostenir el creixement del rendiment en els dissenys tant actuals com futurs. Aquesta tesi analitza i estudia els principals problemes i inconvenients observats en aquests dos recursos: la memòria cache d’últim nivell i la xarxa dins del xip. En primer lloc, s'estudia l'escalabilitat de les xarxes tradicionals dins del xip amb topologia de malla, així com aquesta es pot veure compromesa en propers dissenys que compten amb major nombre de nuclis. Els resultats d'aquest estudi mostren que, a major nombre de nuclis, l'impacte negatiu de la distància entre nuclis en la latència pot afectar seriosament al rendiment del processador. Com a solució' a aquest problema, en aquesta tesi proposem una xarxa d’interconnexió' òptica modelada en un entorn de simulació detallat, que suposa una solució viable als problemes d'escalabilitat observats en els dissenys tradicionals. A continuació, aquesta tesi dedica un esforç important a identificar i proposar solucions als principals problemes de disseny de les jerarquies de memòria actuals com son, per exemple, el sobredimensionat de l'espai de memòria cache privat, l’existència de repliques de dades i la rigidesa i incapacitat d’adaptació' de les estructures de memòria cache. Encara que ben coneguts, aquests problemes i els seus efectes adversos en el rendiment poden ser evitats en processadors d'alt rendiment gracies a l'enorme capacitat de la memòria cache d’últim nivell que aquest tipus de processadors típicament implementen. No obstant això, en processadors de baix consum, no hi ha la possibilitat de comptar amb aquestes capacitats, i fer un us eficient de l'espai disponible es torna crític per mantenir el rendiment. Com a solució a aquests problemes en processadors de baix consum, proposem una nova organització de jerarquia de dos nivells de memòria cache que utilitza una xarxa d’interconnexió òptica. Els resultats obtinguts mostren que, comparat amb dissenys convencionals, el consum d'energia estàtica en l'arquitectura proposada és un 60% menor, malgrat que els resultats de rendiment presenten valors similars. Per últim, hem estes l'arquitectura proposada per donar suport tant a aplicacions paral·leles com seqüencials. Els resultats obtinguts amb aquesta nova arquitectura mostren un estalvi de fins al 78 % d'energia estàtica en l’execució d'aplicacions paral·leles. / [EN] Current multicores face the challenge of sharing resources among the different processor cores. Two main shared resources act as major performance bottlenecks in current designs: the off-chip main memory bandwidth and the last level cache. Additionally, as the core count grows, the network on-chip is also becoming a potential performance bottleneck, since traditional designs may find scalability issues in the near future. Memory hierarchies communicated through fast interconnects are implemented in almost every current design as they reduce the number of off-chip accesses and the overall latency, respectively. Main memory, caches, and interconnection resources, together with other widely-used techniques like prefetching, help alleviate the huge memory access latencies and limit the impact of the core-memory speed gap. However, sharing these resources brings several concerns, being one of the most challenging the management of the inter-application interference. Since almost every running application needs to access to main memory, all of them are exposed to interference from other co-runners in their way to the memory controller. For this reason, making an efficient use of the available cache space, together with achieving fast and scalable interconnects, is critical to sustain the performance in current and future designs. This dissertation analyzes and addresses the most important shortcomings of two major shared resources: the Last Level Cache (LLC) and the Network on Chip (NoC). First, we study the scalability of both electrical and optical NoCs for future multicoresand many-cores. To perform this study, we model optical interconnects in a cycle-accurate multicore simulation framework. A proper model is required; otherwise, important performance deviations may be observed otherwise in the evaluation results. The study reveals that, as the core count grows, the effect of distance on the end-to-end latency can negatively impact on the processor performance. In contrast, the study also shows that silicon nanophotonics are a viable solution to solve the mentioned latency problems. This dissertation is also motivated by important design concerns related to current memory hierarchies, like the oversizing of private cache space, data replication overheads, and lack of flexibility regarding sharing of cache structures. These issues, which can be overcome in high performance processors by virtue of huge LLCs, can compromise performance in low power processors. To address these issues we propose a more efficient cache hierarchy organization that leverages optical interconnects. The proposed architecture is conceived as an optically interconnected two-level cache hierarchy composed of multiple cache modules that can be dynamically turned on and off independently. Experimental results show that, compared to conventional designs, static energy consumption is improved by up to 60% while achieving similar performance results. Finally, we extend the proposal to support both sequential and parallel applications. This extension is required since the proposal adapts to the dynamic cache space needs of the running applications, and multithreaded applications's behaviors widely differ from those of single threaded programs. In addition, coherence management is also addressed, which is challenging since each cache module can be assigned to any core at a given time in the proposed approach. For parallel applications, the evaluation shows that the proposal achieves up to 78% static energy savings. In summary, this thesis tackles major challenges originated by the sharing of on-chip caches and communication resources in current multicores, and proposes new cache hierarchy organizations leveraging optical interconnects to address them. The proposed organizations reduce both static and dynamic energy consumption compared to conventional approaches while achieving similar performance; which results in better energy efficiency. / Puche Lara, J. (2021). Novel Cache Hierarchies with Photonic Interconnects for Chip Multiprocessors [Tesis doctoral]. Universitat Politècnica de València. https://doi.org/10.4995/Thesis/10251/165254

The main goal of this diploma thesis was to implement the proposal of optical access networks in the selected location. Introduce is focused on the physical layer of network. This includes optical fibers, optical cables, connectors, optical splitters, and more. According to the place of termination of optical fiber will be studied best FTTx connections. According to network topology distinguished point to point and point to multipoint network. Networks points to point are also known as an active optical network and for each user are restricted to a separate fiber. Point to multipoint networks known as passive optical network. In terms of the PON is defined by many standards. For a selected location will be choice the most appropriate solution. Finally, the measurement will be made and will be considered for monitoring the route. Before the design of optical access networks, I made an illustrative simulation in program OptSim. Performed simulations helps to study the transmission characters of optical networks, depending on the physical architecture. In general, for the design of high-capabilities networks for large companies will be more appropriate active topology that provides due wavelength multiplexes high transmission capacity. To join in the urban areas with a large number of separate houses, it is more appropriate use of passive topology. For the design of optical networks has been selected location with multiple housing buildings. The end customer is not given the requirement for high data transfer rates as large companies. For the proposal was selected FTTB networks which is suitable because of lower costs. The second variant of the proposal was a passive optical network according to standard GPON. This standard was chosen because of the high splitting ratio. For both solutions was developed the entire proposal by ITU-T with a detailed drawing documentation. In the selected area was conducted measuring the optical networks in order to verify the possibility of extension actual solutions. For a sample issue of measurements, I made several measurements using optical reflectometer over an optical splitter in order to prove the need for measurements during construction. FTTH networks gaining in popularity more and more, but price is the limiting factor.

Approved for public release, distribution is unlimited / In this thesis, the scalability issues of Simple Network Management Protocol (SNMP) in optical network management are explored. It is important to understand the effect of varying the number of nodes, the request inter-arrival times and the polling interval on the performance of SNMP and number of nodes that can be effectively managed. The current study explored the effect of varying these parameters in a controlled test environment using the OPNET simulation package. In addition, traffic analysis was performed on measured SNMP traffic and statistics were developed from the traffic analysis. With this understanding of SNMP traffic, an SNMPv1 model was defined and integrated into an OPNET network model to study the performance of SNMP. The simulation results obtained were useful in providing needed insight into the allowable number of nodes an optical network management system can effectively manage. / Civilian, Singapore Ministry of Defense

Para suportar as novas aplicações heterogêneas e dinâmicas, como a TV digital interativa, os vídeos sob demanda e a computação em nuvem, as redes ópticas WDM (wavelength division multiplexing) estão passando por uma grande mudança. Estão deixando de ser estáticas para se tornarem reconfiguráveis. Assim, elas devem suportar diferentes taxas e formatos de modulação, que podem variar com o tempo, tornando-as heterogêneas tanto no que se refere aos tipos de serviços, quanto às tecnologias de transmissão. Assim, novos desafios para controlar e administrar estas redes estão surgindo e soluções cognitivas estão começando a ser estudadas. Uma das premissas de uma solução cognitiva é a adaptabilidade. Neste cenário, este trabalho propõe uma metodologia de controle adaptativo de ganho para amplificadores ópticos em redes WDM dinâmicas. Tal metodologia baseia-se em uma máscara de potência com informações sobre o desempenho óptico do amplificador em termos de figura de ruído e \"planicidade\" espectral de ganho, ajustando seu ponto de operação visando um compromisso entre estes parâmetros. Esta metodologia foi aplicada em um problema de roteamento e alocação de comprimento de onda para algumas topologias de redes com 4, 6, 10 e 15 nós e considerando uma restrição de qualidade de serviço, relacionada à OSNR do sinal, para realização da conexão. Os resultados mostram uma redução na probabilidade de bloqueio total com a aplicação da metodologia proposta em relação a um cenário sem a metodologia de 80% para abaixo de 20% em alguns casos. / To support new dynamic and heterogeneous applications such as interactive digital TV, video on demand and cloud computing, WDM (wavelength division multiplexing) optical networks are undergoing significant changes. They are changing from static to reconfigurable networks. Thus, they need to support different data rates and modulation formats, which can varie along the time, leading to a heterogeneous network with respect not only to different services, but also to different transmission technology. Therefore, new network control and management challenges are arising and cognitive solutions are being studied. One of the cognitive solution premises is adaptability. In this scenario, this work propose an adaptive gain control methodology for optical amplifiers in WDM dynamic optical networks. Such methodology is based on a power mask with information about the amplifier optical performance in terms of noise figure and gain flatness, adjusting its operating point aiming to the best trade off between these parameters. This methodology was applied to a routing and wavelength assignment problem to some network topology with 4, 6, 10 and 15 nodes and considering a quality of service constraint, due to the signal OSNR, to accomplish the connection. Results show blocking probability reduction from 80% to bellow 20% for some cases from a scenario without the methodology to one with it.

O objetivo deste trabalho é a otimização da distribuição dos divisores de potência utilizados em redes ópticas passivas, baseados na técnica de algoritmos genéticos, onde cada divisor possui uma única entrada e diversas saídas. O cenário prático de distribuição compreende uma determinada cidade, onde as ruas são as possíveis vias e as casas ou prédios são os possíveis terminais. Partindo de um ponto inicial (OLT - Optical Line Terminator), em geral a central de distribuição, chega-se aos usuários finais (ONUs - Optical Network Units) passando pelos divisores. Observa-se que temos pelo menos um ponto inicial (OLT) e diversos pontos de chegada (as ONUs) - dependendo da quantidade de saídas que o divisor óptico possui, cada uma destas representa um possível usuário ou outro divisor. O posicionamento dos divisores de potência e os caminhos utilizados que usaremos fazem parte de nossa solução. O conjunto destes elementos forma as redes de acesso óptico passivo (PON). Aspectos importantes considerados na otimização: (i) os comprimentos dos cabos desde a OLT até as ONUs, uma vez que ocorrem maiores degradações do sinal à medida que a distância aumenta, bem como aumentam os custos de implantação em proporção direta ao comprimento utilizado; e (ii) margem de potência no enlace e (iii) custo do enlace. Durante o processo de otimização, o algoritmo genético desenvolvido propõe um novo procedimento de busca de caminho denominado nó cíclico. Os resultados obtidos foram validados por comparações obtidas manualmente em redes de menor escala. Interfaces gráficas para carregamento de mapas urbanos a partir de aplicativos como Google map foram desenvolvidas. / This study, based on a genetic algorithm, optimizes the distribution of power dividers used, in the access, by passive optical networks, where each splitter has one input and several outputs. The practical scenario of distribution includes a particular city where the streets are the possible ways and the houses or buildings are the possible terminals. Starting from the OLT (Optical Line Terminal), in general the distribution center, the end users (ONUs - Optical Network Units) are connected to the OLT by a path with power divisions. Observe that we have at least one starting point (OLT) and several points of arrival (the ONUs) - depending on the amount of the optical splitter outputs, each of these representing a user. The positioning of the OLT, ONUs and power dividers are part of the solution we are seeking for and all these elements form the access passive optical network (PON). Important aspects considered: (i) the lengths of the cables from the OLT to the ONUs, once there are more signal degradation as the distance increases, (ii) link power budget and (iii) link cost. During the optimization process, the developed genetic algorithm proposes a new procedure for finding the optimum path which is called cyclic node. The obtained results have been validated by comparison with manual optimization in a smaller scale network. Graphical interfaces have been developed for uploading city maps from aplicatives Google maps.