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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
41

SCALABLE BUS ENCODING FOR ERROR-RESILIENT HIGH-SPEED ON-CHIP COMMUNICATION

Karmarkar, Kedar Madhav 01 August 2013 (has links)
Shrinking minimum feature size in deep sub-micron has made fabrication of progressively faster devices possible. The performance of interconnects has been a bottleneck in determining the overall performance of a chip. A reliable high-speed communication technique is necessary to improve the performance of on-chip communication. Recent publications have demonstrated that use of multiple threshold voltages improves the performance of a bus significantly. The multi-threshold capture mechanism takes advantage of predictable temporal behavior of a tightly coupled bus to predict the next state of the bus early. However, Use of multiple threshold voltages also reduces the voltage slack and consequently increases the susceptibility to noise. Reduction in supply voltage exacerbates the situation. This work proposes a novel error detection and correction encoding technique that takes advantage of the high performance of the multi-threshold capture mechanism as well as its inbuilt redundancy to achieve reliable high-speed communication while introducing considerably less amount of redundancy as compared to the conventional methods. The proposed technique utilizes graph-based algorithms to produce a set of valid code words. The algorithm takes advantage of implicit set operations using binary decision diagram to improve the scalability of the code word selection process. The code words of many crosstalk avoidance codes including the proposed error detection and correction technique exhibit a highly structured behavior. The sets of larger valid code words can be recursively formed using the sets of smaller valid code words. This work also presents a generalized framework for scalable on-chip code word generation. The proposed CODEC implementation strategy uses a structured graph to model the recursive nature of an encoding technique that facilitates scalable CODEC implementation. The non-enumerative nature of the implementation strategy makes it highly scalable. The modular nature of the CODEC also simplifies use of pipelined architecture thereby improving the throughput of the bus.
42

SYNTHESIS AND TESTING OF THRESHOLD LOGIC CIRCUITS

PALANISWAMY, ASHOK KUMAR 01 December 2014 (has links)
Threshold logic gates gaining more importance in recent years due to the significant development in the switching devices. This renewed the interest in synthesis and testing of circuits with threshold logic gates. Two important synthesis considerations of threshold logic circuits are addressed namely, threshold logic function identification and reducing the total number of threshold logic gates required to represent the given boolean circuit description. A fast method to identify the given Boolean function as a threshold logic function with weight assignment is introduced. It characterizes the threshold logic function based on the modified chows parameters which results in drastic reduction in time and complexity. Experiment results shown that the proposed method is at least 10 times faster for each input and around 20 times faster for 7 and 8 input, when comparing with the algorithmic based methods. Similarly, it is 100 times faster for 8 input, when comparing with asummable method. Existing threshold logic synthesis methods decompose the larger input functions into smaller input functions and perform synthesis for them. This results in increase in the number of threshold logic gates required to represent the given circuit description. The proposed implicit synthesis methods increase the size of the functions that can be handled by the synthesis algorithm, thus the number of threshold logic gates required to implement very large input function decreases. Experiment results shown that the reduction in the TLG count is 24% in the best case and 18% on average. An automatic test pattern generation approach for transition faults on a circuit consisting of current mode threshold logic gates is introduced. The generated pattern for each fault excites the maximum propagation delay at the gate (the fault site). This is a high quality ATPG. Since current mode threshold logic gate circuits are pipelined and the combinational depth at each pipeline stage is practically one. It is experimentally shown that the fault coverage for all benchmark circuits is approximately 97%. It is also shown that the proposed method is time efficient.
43

Compactação de vídeo escalável / Scalable Compression

Soler, Luciano January 2006 (has links)
A codificação de vídeo é um problema cuja solução deve ser projetada de acordo com as necessidades da aplicação desejada. Neste trabalho, um método de compressão de vídeo com escalabilidade é apresentado, apresentando melhorias dos formatos de compressão atuais. A escalabilidade corresponde a capacidade de extrair do bitstream completo, conjuntos eficientes de bits que são decodificados oferecendo imagens ou vídeos decodificados com uma variação (escala) segundo uma dada característica da imagem ou vídeo. O número de conjuntos que podem ser extraídos do bitstream completo definem a granularidade da escalabilidade fornecida, que pode ser muito fina ou com passos grossos. Muitas das técnicas de codificação escalável utilizam uma camada base que deve ser sempre decodificada e uma ou mais camadas superiores que permitem uma melhoria em termos de qualidade (SNR), resolução espacial e/ou resolução temporal. O esquema de codificação escalável final presente na norma MPEG-4 é uma das técnicas mais promissoras, pois pode adaptar-se às características dos canais (Internet) ou terminais que apresentam um comportamento variável ou desconhecido, como velocidade maxima de acesso, variações de largura de banda, erros de canal, etc. Apesar da norma MPEG-4 FGS se afirmar como uma alternativa viável para aplicações de distribuição de vídeo, possui uma quebra significativa de desempenho em comparação com a codificação não escalável de vídeo (perfil ASP da norma MPEG-4 Visual). Este trabalho tem por objetivo estudar novas ferramentas de codificação de vídeo introduzidas na recente norma H.264/AVC e MPEG-4 Visual, desenvolvendo um modelo que integre a escalabilidade granular presente no MPEG-4 aos avanços na área de codificação presentes no H.264/AVC. Esta estrutura de escalabilidade permite reduzir o custo em termos de eficiência da codificação escalável. Os resultados apresentados dentro de cada capítulo mostram a eficácia do método proposto bem como idéias para melhorias em trabalhos futuros. / Video encoding is a problem whose solution should be designed according to the need of intended application. This work presents a method of video compression with scalability that improves the current compression formats. Scalability represents the extracting capacity of full bitstream, efficient set of bits that are decoded to supply images or decoded videos with a variation according to a given image or video feature. A number of sets that can be extracted from full bitstream defines the supplied scalability granularity, which can be very thin or with thick steps. Most scalable video coding techniques use a base layer which must always be decoded and one or more higher layers which allow improvements in terms of quality (also known as SNR), frame/sampling rate or spatial resolution (for images and video). The MPEG-4 Fine Granularity Scalable (FGS) video coding scheme is one of the most promising techniques, because it can adapt itself to the features of channels (Internet) or terminals that present an unpredictable or unknown behavior, as maximum speed of access, variations of the bandwidth, channel errors, etc. Although the MPEG-4 FGS standard is a feasible solution for video streaming applications, it shows a significant loss of performance in comparison with non-scalable video coding, in particular the rather efficient Advanced Simple Profile defined in MPEG-4 Visual Standard. This work aims at studying new tools of video encoding introduced by the recent H.264/AVC norm and Visual MPEG-4, developing a model that integrates the granular scalability present in MPEG-4 to the coding improvements present in H.264/AVC. This new scalability structure allows cost reduction in terms of efficiency of the scalable coding. The results presented in each chapter show the effectiveness of the proposed method as well as ideas for improvements in future work.
44

Scalable Perceptual Image Coding for Remote Sensing Systems

Oh, Han, Lalgudi, Hariharan G. 10 1900 (has links)
ITC/USA 2008 Conference Proceedings / The Forty-Fourth Annual International Telemetering Conference and Technical Exhibition / October 27-30, 2008 / Town and Country Resort & Convention Center, San Diego, California / In this work, a scalable perceptual JPEG2000 encoder that exploits properties of the human visual system (HVS) is presented. The algorithm modifies the final three stages of a conventional JPEG2000 encoder. In the first stage, the quantization step size for each subband is chosen to be the inverse of the contrast sensitivity function (CSF). In bit-plane coding, two masking effects are considered during distortion calculation. In the final bitstream formation step, quality layers are formed corresponding to desired perceptual distortion thresholds. This modified encoder exhibits superior visual performance for remote sensing images compared to conventional JPEG2000 encoders. Additionally, it is completely JPEG2000 Part-1 compliant, and therefore can be decoded by any JPEG2000 decoder.
45

Smart Radio Control System (For Flight Test Centers)

Rubio, Pedro, Alvarez, Jesus 10 1900 (has links)
ITC/USA 2015 Conference Proceedings / The Fifty-First Annual International Telemetering Conference and Technical Exhibition / October 26-29, 2015 / Bally's Hotel & Convention Center, Las Vegas, NV / Among the rich infrastructure of a Telemetry/Ground Station Center dwells the subset dedicated to radio communications. Radios are mainly used to communicate with the aircraft under test in order to give guidance and feedback from ground specialists. Sometimes, however, radios themselves become the subject of the test, requiring a full set of them with all their features and capabilities (Military Modes, HF ALE, SELCAL, etc). Remote control (and audio routing) of these radios is a critical as infrastructures scale over tens of radios, distributed amid different test centers separated by hundreds of kilometers. Addition of a remote touch user interface, MIL COMSEC and TRANSEC modes, automatic audio routing, together with a maintenance free requirement, makes the whole issue far more difficult to manage. Airbus Defense & Space has developed a Smart Radio Control System allowing to profit from those advantages and more benefits: *Intuitive Touch UI *Automatic Audio Routing *Distributed infrastructure (network based) *Autonomous and service free (no one, other than FTC needed to operate it) *Heterogeneous (any radio can be controlled by creating a plug & play library) *Special Modes support (COMSEC, TRANSEC, HF ALE, and SELCAL) Future additions will include, amongst others, VoIP integration and tablet use.
46

Compactação de vídeo escalável / Scalable Compression

Soler, Luciano January 2006 (has links)
A codificação de vídeo é um problema cuja solução deve ser projetada de acordo com as necessidades da aplicação desejada. Neste trabalho, um método de compressão de vídeo com escalabilidade é apresentado, apresentando melhorias dos formatos de compressão atuais. A escalabilidade corresponde a capacidade de extrair do bitstream completo, conjuntos eficientes de bits que são decodificados oferecendo imagens ou vídeos decodificados com uma variação (escala) segundo uma dada característica da imagem ou vídeo. O número de conjuntos que podem ser extraídos do bitstream completo definem a granularidade da escalabilidade fornecida, que pode ser muito fina ou com passos grossos. Muitas das técnicas de codificação escalável utilizam uma camada base que deve ser sempre decodificada e uma ou mais camadas superiores que permitem uma melhoria em termos de qualidade (SNR), resolução espacial e/ou resolução temporal. O esquema de codificação escalável final presente na norma MPEG-4 é uma das técnicas mais promissoras, pois pode adaptar-se às características dos canais (Internet) ou terminais que apresentam um comportamento variável ou desconhecido, como velocidade maxima de acesso, variações de largura de banda, erros de canal, etc. Apesar da norma MPEG-4 FGS se afirmar como uma alternativa viável para aplicações de distribuição de vídeo, possui uma quebra significativa de desempenho em comparação com a codificação não escalável de vídeo (perfil ASP da norma MPEG-4 Visual). Este trabalho tem por objetivo estudar novas ferramentas de codificação de vídeo introduzidas na recente norma H.264/AVC e MPEG-4 Visual, desenvolvendo um modelo que integre a escalabilidade granular presente no MPEG-4 aos avanços na área de codificação presentes no H.264/AVC. Esta estrutura de escalabilidade permite reduzir o custo em termos de eficiência da codificação escalável. Os resultados apresentados dentro de cada capítulo mostram a eficácia do método proposto bem como idéias para melhorias em trabalhos futuros. / Video encoding is a problem whose solution should be designed according to the need of intended application. This work presents a method of video compression with scalability that improves the current compression formats. Scalability represents the extracting capacity of full bitstream, efficient set of bits that are decoded to supply images or decoded videos with a variation according to a given image or video feature. A number of sets that can be extracted from full bitstream defines the supplied scalability granularity, which can be very thin or with thick steps. Most scalable video coding techniques use a base layer which must always be decoded and one or more higher layers which allow improvements in terms of quality (also known as SNR), frame/sampling rate or spatial resolution (for images and video). The MPEG-4 Fine Granularity Scalable (FGS) video coding scheme is one of the most promising techniques, because it can adapt itself to the features of channels (Internet) or terminals that present an unpredictable or unknown behavior, as maximum speed of access, variations of the bandwidth, channel errors, etc. Although the MPEG-4 FGS standard is a feasible solution for video streaming applications, it shows a significant loss of performance in comparison with non-scalable video coding, in particular the rather efficient Advanced Simple Profile defined in MPEG-4 Visual Standard. This work aims at studying new tools of video encoding introduced by the recent H.264/AVC norm and Visual MPEG-4, developing a model that integrates the granular scalability present in MPEG-4 to the coding improvements present in H.264/AVC. This new scalability structure allows cost reduction in terms of efficiency of the scalable coding. The results presented in each chapter show the effectiveness of the proposed method as well as ideas for improvements in future work.
47

Scalable and Reliable File Transfer for Clusters Using Multicast.

Shukla, Hardik Dikpal 01 August 2002 (has links)
A cluster is a group of computing resources that are connected by a single computer network and are managed as a single system. Clusters potentially have three key advantages over workstations operated in isolation—fault tolerance, load balancing and support for distributed computing. Information sharing among the cluster’s resources affects all phases of cluster administration. The thesis describes a new tool for distributing files within clusters. This tool, the Scalable and Reliable File Transfer Tool (SRFTT), uses Forward Error Correction (FEC) and multiple multicast channels to achieve an efficient reliable file transfer, relative to heterogeneous clusters. SRFTT achieves scalability by avoiding feedback from the receivers. Tests show that, for large files, retransmitting recovery information on multiple multicast channels gives significant performance gains when compared to a single retransmission channel.
48

Practices of Brokering: Between STS and Feminist Engineering Education Research

Beddoes, Kacey 05 January 2012 (has links)
This project documents my efforts to publish STS- and gender theory-informed articles in engineering education journals. It analyzes the processes of writing and revising three articles submitted to three different journals, aiming to shed light on the field of engineering education, gender research therein, and contribute to feminist science studies literature on the challenges and opportunities of interdisciplinary work across women's studies and STEM fields. Building upon Wenger's concept of brokering, I analyze how I brought previously underexplored STS and feminist theory literature into engineering education journals. In producing this dissertation, I aim to illuminate some of the efforts and challenges of bringing STS and Women's Studies (WS) topics into engineering education journals – thus producing an account of brokering practices and an example of scalable scholarship. The first chapter introduces engineering education research (EER) as a field of inquiry, situates my project with respect to current feminist science studies, summarizes the framework of brokering that informs my analyses, and describes my methodology. The second chapter describes my initial attempts at brokering by identifying and bridging differences and the preliminary brokering practices that emerged through writing and revising the first of my three articles. It discusses an article published in Journal of Engineering Education that analyzes the uses of feminist theory in EER and argues that further engagement with a broader range of feminist theories could benefit EER. The third chapter describes how some of these practices were reinforced, but also supplemented, while writing and revising the second article. It discusses an article published in International Journal of Engineering Education that analyzes problematizations of underrepresentation in EER and argues that further reflection upon and formal discussion of how underrepresentation is framed could benefit EER. The forth chapter describes how the established brokering practices guided writing the third article, making the process easier as I had become more comfortable with the requirements and challenges of brokering. It discusses an article submitted to European Journal of Engineering Education that analyzes feminist research methodologies in the context of EER, using data from interviews with feminist engineering educators. The fifth chapter concludes by summarizing the brokering practices and discussing their respective challenges, discussing the implications of this project for STS and WS, and, finally, by discussing other implications for peer review engineering education. The Appendix contains aims, scope, author guidelines, and review criteria for the three journals. Chapters 2, 3, and 4 each begin with a narrative recounting of the practices of brokering that went into producing and revising each article. The narratives describe processes of writing and preparing to submit the articles, reviews received, and subsequent revision processes. The published or submitted articles appear after the brokering narrative. / Ph. D.
49

Fully Distributed Control and Its Analog IC Design For Scalable Multiphase Voltage Regulators

Zhang, Xin 06 December 2005 (has links)
Modern microprocessors require low supply voltage (about 1V), but very high current (maximum current is 300A in servers, 100A in desktop PCs and 70A in notebook PCs), and tighter voltage regulation. However, the size of a CPU Voltage Regulator (VR) needs to be reduced. To achieve much higher power density with decent efficiency in VR design is a major challenge. Moreover, the CPU current rating can vary from 40A to 300A for different kinds of computers, and CPU power supply specifications change quickly even for the same type of computers. Since the maximum power rating of one channel converter is limited, the VR channel number may vary over a large range to meet VR specifications. Traditionally, VR design with different channel numbers needs different types of VR controllers. To reduce the developing cost of different control ICs, and to maximize the market share of one design, scalable phase design based on the same type of IC is a new trend in VR design. To achieve higher power density and at the same time to achieve scalable phase design, the concept of Monolithic Voltage Regulator Channel (MVRC) is introduced in this dissertation. MVRC is a power IC with one channel converter's power MOSFETs, drivers and control circuitries monolithically integrated based on lateral device technology and working at high frequency. It can be used alone to supply a POL (Point of Load). And without the need for a separate master controller, multiple MVRC chips can be paralleled together to supply a higher current load such as a CPU. To make MVRC a reality, the key is to develop a fully distributed control scheme and its associated analog IC circuitry, so that it can provide control functions required by microprocessors and the performance must be equal or better than a traditional a centralized VRM controller. These functions includes: multiphase interleaving, Adaptive Voltage Position (AVP) and current sharing. To achieve interleaving, this dissertation introduces a novel distributed interleaving scheme that can easily achieve scalable phase interleaving without channel number limitation. Each channel's interleaving circuitry can be monolithically integrated without any external components. The proposed scheme is verified by a hardware prototype. The key building block is a self-adjusting saw-tooth generator, which can produce accurate saw-tooth waveforms without trimming. The interleaving circuit for each channel has two self-adjusting saw-tooth generators. One behaves as a Phase Lock Loop to produce accurate phase delay, and the other produces carrier signals. To achieve Adaptive Voltage Position and current sharing, a novel distributed control scheme adopting the active droop control for each channel is introduced. Verified by hardware testing and transient simulations, the proposed distributed AVP and current sharing control scheme meets the requirements of Intel's guidelines for today and future's VR design. Monte Carlo simulation and statistics analysis show that the proposed scheme has a better AVP tolerance band than the traditional centralized control if the same current sensing scheme is used, and its current sharing performance is as good as the traditional control. It is critical for the current sensing to achieve a tight AVP regulation window and good current sharing in both the traditional centralized control scheme and the proposed distributed control scheme. Inductor current sensing is widely adopted because of the acceptable accuracy and no extra power loss. However, the Signal-to-Noise Ratio (SNR) of the traditional inductor current sensing scheme may become too small to be acceptable in high frequency VR design where small inductor with small DCR is often adopted. To improve the SNR, a novel current sensing scheme with an accurate V/I converter is proposed. To reduce the complexity of building an accurate V/I converter with traditional Opamps, an accurate monolithic transconductance (Gm) amplifier with a large dynamic range is developed. The proposed Gm amplifier can achieve accurate V/I conversion without trimming. To obtain further verification, above proposed control schemes are monolithically integrated in a dual channel synchronous BUCK controller using TSMC BiCMOS 0.5um process. Testing results show that all the proposed novel analog circuits work as expected. System testing results show good interleaving, current sharing and AVP performance. The silicon size of each channel is 1800×1000um². With proposed current sensing, interleaving, AVP and current sharing, as well as their associated analog IC implementations, the technical barriers to develop a MVRC are overcome. MVRC has the potential to become a generic power IC solution for today and future POL and CPU power management. The proposed distributed interleaving, AVP and current sharing schemes can also be used in any cellular converter system. The proposed analog building blocks like the self-adjusting saw-tooth generator and the accurate transconductance amplifier can be used as basic building blocks in any DC-DC controller. / Ph. D.
50

Programming Support for Scalable, Serializable and Elastic Cloud Applications

Bo Sang (5930225) 30 July 2020 (has links)
<div>Elasticity is an essential feature for cloud applications to handle varying and unpredictable workloads in a cost-effective way on cloud platforms. However, implementing a stateful elastic application is hard, as programmers have to: (1) reason about concurrent execution in the applications (serializability); (2) guarantee the application can process more requests with larger scale (scalability); and (3) provide elasticity management to improve performance and resource efficiency for applications (efficient elasticity management). Unfortunately, addressing all those concerns requires deep understanding and rich experience in distributed systems and cloud computing. </div><div> </div><div>In this dissertation, we provide programming support to help programmers implement their stateful elastic cloud applications in a simpler manner. Specifically, we present AEON, an actor-based programming language, and \arch, an elastic programming framework. On the one hand, AEON provides programmers with scalability and serialzability, executing actor-based programs in a serialized manner while still retaining a high degree of parallelism. Meanwhile, AEON can adjust programs' scale via fine-grained live actor migration. On the other hand, PLASMA includes (1) an elastic programming language as a second ``level'' of programming (complementing the main application programming language) for describing elasticity behaviors, and (2) a novel semantics-aware elasticity management runtime that tracks program execution and acts upon application features as suggested by elasticity behaviors. </div><div>With these, PLASMA can provide efficient elasticity management to cloud applications</div>

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