This project documents my efforts to publish STS- and gender theory-informed articles in engineering education journals. It analyzes the processes of writing and revising three articles submitted to three different journals, aiming to shed light on the field of engineering education, gender research therein, and contribute to feminist science studies literature on the challenges and opportunities of interdisciplinary work across women's studies and STEM fields. Building upon Wenger's concept of brokering, I analyze how I brought previously underexplored STS and feminist theory literature into engineering education journals. In producing this dissertation, I aim to illuminate some of the efforts and challenges of bringing STS and Women's Studies (WS) topics into engineering education journals – thus producing an account of brokering practices and an example of scalable scholarship. The first chapter introduces engineering education research (EER) as a field of inquiry, situates my project with respect to current feminist science studies, summarizes the framework of brokering that informs my analyses, and describes my methodology. The second chapter describes my initial attempts at brokering by identifying and bridging differences and the preliminary brokering practices that emerged through writing and revising the first of my three articles. It discusses an article published in Journal of Engineering Education that analyzes the uses of feminist theory in EER and argues that further engagement with a broader range of feminist theories could benefit EER. The third chapter describes how some of these practices were reinforced, but also supplemented, while writing and revising the second article. It discusses an article published in International Journal of Engineering Education that analyzes problematizations of underrepresentation in EER and argues that further reflection upon and formal discussion of how underrepresentation is framed could benefit EER. The forth chapter describes how the established brokering practices guided writing the third article, making the process easier as I had become more comfortable with the requirements and challenges of brokering. It discusses an article submitted to European Journal of Engineering Education that analyzes feminist research methodologies in the context of EER, using data from interviews with feminist engineering educators. The fifth chapter concludes by summarizing the brokering practices and discussing their respective challenges, discussing the implications of this project for STS and WS, and, finally, by discussing other implications for peer review engineering education. The Appendix contains aims, scope, author guidelines, and review criteria for the three journals. Chapters 2, 3, and 4 each begin with a narrative recounting of the practices of brokering that went into producing and revising each article. The narratives describe processes of writing and preparing to submit the articles, reviews received, and subsequent revision processes. The published or submitted articles appear after the brokering narrative. / Ph. D.

In this thesis we present a parallel implementation of an engineering code which simulates the deformations caused when forces are applied to a piezoelectric-controlled smart structure. The parallel simulation, whose domain decomposition relies on the finite element representation of the structure, is created with an emphasis on scalability of both memory requirements and run time. We take into consideration sequential performance enhancements, the structure of a banded symmetric positive definite linear system, and the overhead required to completely distribute the problem across the processors. The resulting code is scalable, with the exception of a banded Cholesky factorization, which does not fully utilize the parallel environment. / Master of Science

Shrinking minimum feature size in deep sub-micron has made fabrication of progressively faster devices possible. The performance of interconnects has been a bottleneck in determining the overall performance of a chip. A reliable high-speed communication technique is necessary to improve the performance of on-chip communication. Recent publications have demonstrated that use of multiple threshold voltages improves the performance of a bus significantly. The multi-threshold capture mechanism takes advantage of predictable temporal behavior of a tightly coupled bus to predict the next state of the bus early. However, Use of multiple threshold voltages also reduces the voltage slack and consequently increases the susceptibility to noise. Reduction in supply voltage exacerbates the situation. This work proposes a novel error detection and correction encoding technique that takes advantage of the high performance of the multi-threshold capture mechanism as well as its inbuilt redundancy to achieve reliable high-speed communication while introducing considerably less amount of redundancy as compared to the conventional methods. The proposed technique utilizes graph-based algorithms to produce a set of valid code words. The algorithm takes advantage of implicit set operations using binary decision diagram to improve the scalability of the code word selection process. The code words of many crosstalk avoidance codes including the proposed error detection and correction technique exhibit a highly structured behavior. The sets of larger valid code words can be recursively formed using the sets of smaller valid code words. This work also presents a generalized framework for scalable on-chip code word generation. The proposed CODEC implementation strategy uses a structured graph to model the recursive nature of an encoding technique that facilitates scalable CODEC implementation. The non-enumerative nature of the implementation strategy makes it highly scalable. The modular nature of the CODEC also simplifies use of pipelined architecture thereby improving the throughput of the bus.

A cluster is a group of computing resources that are connected by a single computer network and are managed as a single system. Clusters potentially have three key advantages over workstations operated in isolation—fault tolerance, load balancing and support for distributed computing. Information sharing among the cluster’s resources affects all phases of cluster administration. The thesis describes a new tool for distributing files within clusters. This tool, the Scalable and Reliable File Transfer Tool (SRFTT), uses Forward Error Correction (FEC) and multiple multicast channels to achieve an efficient reliable file transfer, relative to heterogeneous clusters. SRFTT achieves scalability by avoiding feedback from the receivers. Tests show that, for large files, retransmitting recovery information on multiple multicast channels gives significant performance gains when compared to a single retransmission channel.

Research on heterojunction (HJ) metal oxide thin film transistors (TFTs) has accelerated remarkably over the last decade due to their superior performance over their conventional single-layer (SL) counterparts. Promising results in laboratory-scale demonstrations have further triggered an increased number of investigations into fabrication and processing techniques for the large-scale integration of HJ metal oxide TFTs. Nevertheless, a lack of consensus regarding the most appropriate scalable manufacturing technique, which combines low-cost and high-throughput fabrication, holds back new opportunities for HJ metal oxide TFTs in emerging applications. In this thesis, novel approaches and strategies are introduced to facilitate the large-scale integration of HJ metal oxide TFTs. The first study of this dissertation introduces the solution-processed In2O3/ZnO heterojunction TFTs with a high-κ bilayer dielectric consisting of Al2O3/ZrO2. Processing was carried out on rigid glass as well as flexible PEN substrates via rapid flash lamp annealing (FLA) as an alternative scalable and high-throughput processing route to conventional thermal annealing. In the second study of the dissertation, a novel 3D/2D/3D mixed-dimensional channel concept was developed with the combination of scalable spray coating and FLA techniques. The insertion of sprayed MoS2 nanoflakes between flashed SnO2/ZnO HJ results in outstanding device performance with a high mobility value of 62 cm2/Vs compared to single layers as well as heterojunction metal oxide TFTs, showing maximum mobility of 4.48 cm2/Vs. In the third study, the fabrication of In2O3/ZnO heterojunction metal oxide TFTs with solution-processed conductive Ti3C2Tx MXene contacts using a processing route that fully relies on a scalable spray coating process is demonstrated as an alternative to low-throughput vacuum-based electrodes. Notably, the proposed approach was successfully upscaled to a 4-inch glass substrate, underlining the significant potential garnered by MXene electrodes for industrial-scale electronics. The last study of the dissertation exploits the advantages of the adhesion-lithography (a-Lith) technique, which enables the development of coplanar self-aligned gate (SAG) In2O3/ZnO heterojunction TFTs and their facile integration into large-area electronics. Using the a-Lith technique, coplanar SAG architectures were fabricated where the gate and dielectric (Al and Al2O3, respectively) are located side by side with the source/drain electrodes (Au), separated from each other by nanogaps.

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