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P- and e- type Semiconductor layers optimization for efficient perovskite photovoltaicsTambwe, Kevin January 2019 (has links)
>Magister Scientiae - MSc / Perovskite solar cells have attracted a tremendous amount of research interest in the scientific community recently, owing to their remarkable performance reaching up to 22% power conversion efficiency (PCE) in merely 6 to 7 years of development. Numerous advantages such as reduced price of raw materials, ease of fabrication and so on, have contributed to their increased popularity.
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Analysis of the Annealing Budget of Metal Oxide Thin-Film Transistors Prepared by an Aqueous Blade-Coating ProcessTang, Tianyu, Dacha, Preetam, Haase, Katherina, Kreß, Joshua, Hänisch, Christian, Perez, Jonathan, Krupskaya, Yulia, Tahn, Alexander, Pohl, Darius, Schneider, Sebastian, Talnack, Felix, Hambsch, Mike, Reineke, Sebastian, Vaynzof, Yana, Mannsfeld, Stefan C. B. 18 April 2024 (has links)
Metal oxide (MO) semiconductors are widely used in electronic devices due to their high optical transmittance and promising electrical performance. This work describes the advancement toward an eco-friendly, streamlined method for preparing thin-film transistors (TFTs) via a pure water-solution blade-coating process with focus on a low thermal budget. Low temperature and rapid annealing of triple-coated indium oxide thin-film transistors (3C-TFTs) and indium oxide/zinc oxide/indium oxide thin-film transistors (IZI-TFTs) on a 300 nm SiO2 gate dielectric at 300 °C for only 60 s yields devices with an average field effect mobility of 10.7 and 13.8 cm2 V−1 s−1, respectively. The devices show an excellent on/off ratio (>106), and a threshold voltage close to 0 V when measured in air. Flexible MO-TFTs on polyimide substrates with AlOx dielectrics fabricated by rapid annealing treatment can achieve a remarkable mobility of over 10 cm2 V−1 s−1 at low operating voltage. When using a longer post-coating annealing period of 20 min, high-performance 3C-TFTs (over 18 cm2 V−1 s−1) and IZI-TFTs (over 38 cm2 V−1 s−1) using MO semiconductor layers annealed at 300 °C are achieved.
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