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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
1

Prise en compte de la CEM dans une méthodologie de pré-dimensionnement par optimisation déterministe en électronique de puissance : application à un redresseur triphasé aéronautique / Taking into account EMC in a pre-design methodology using deterministic optimization for power electronics : application to a three-phase rectifier for aeronautics

Baraston, Arnaud 07 February 2019 (has links)
Ce travail s’inscrit dans l’optique de prédimensionnement par optimisation déterministe en électronique de puissance. Nous nous focalisons principalement sur la problématique de la Compatibilité ElectroMagnétique que nous désirons inclure dans la démarche. Pour cela, nous considérons l’exemple d’un redresseur triphasé comportant des filtres CEM à la fois du côté triphasé et du côté continu. Un couplage de mode commun a lieu entre les deux filtres, ils doivent donc être conçus simultanément. Des modéles de dimensionnement du convertisseur et de ses différents composants (passifs, interrupteurs, refroidisseur) ont été élaborés. Dans la procédure d’optimisation, l’ensemble des variables de cette modélisation globale du convertisseur (valeur des éléments fonctionnels, stratégie de commande MLI et fréquence de découpage) impacte les émissions CEM conduites. Ainsi, le modèle de calcul CEM est intégré dans le déroulement du processus, qui vise à minimiser la masse du convertisseur. Grâce à cela nous obtenons une approche globale où les filtres CEM sont dimensionnés en parallèle avec le convertisseur, et non une fois que la conception de ce dernier soit terminée, comme c’est classiquement le cas.La variation de la fréquence de découpage durant l’optimisation a constitué le problème majeur. Nous avons dû développer des stratégies concernant la surveillance des spectres CEM pour arriver à diminuer drastiquement les temps de calcul. Nous avons aussi développé une formulation de la contrainte CEM et une stratégie de lancement automatique d’optimisations déterministes avec paramétrage initial aléatoire qui a permis aux dimensionnements d’aboutir. Tout au long de la thèse, l’accent a été mis sur la généricité des modèles, qu’ils touchent à la CEM ou aux autres points du dimensionnement, en vue de leur adaptabilité à d’autres cas d’application. / This thesis deals with the sizing of power electronics using deterministic optimization. In this way, methods to integrate the ElectroMagnetic Compatibility constraints in such process were studied. The case of a three-phase rectifier with EMC filters on both AC and DC sides was considered. A common-mode path creates an interaction between the two filters, thus they have to be sized together. Models of the converter and its components were developed for their sizing by deterministic optimizations. In such conception problem, all the parameters used for describing the system configuration (functional elements values, PWM command strategy and the switching frequency) influence the conducted EMC emissions. Therefore, the modeling of the EMC constraints was integrated in the optimization procedure, which aims the overall weight reduction. Thanks to that, a global approach where EMC filters are sized along with the converter was achieved, whereas it is usually done after the converter conception.The main challenge was the variation of the switching frequency in optimization. Strategies were developed regarding the automatic surveillance of the EMC spectrums in order to drastically reduce their computation times. An innovative formulation of the EMC constraints enabled the optimizations to converge. An automatic procedure for launching multiple deterministic optimizations with random initial parameters allowed us to obtain good optimization results, regarding the constraints and the global weight of the system. In this work, genericity of the modelling approach was a main concern, regarding EMC and the different sizing models. Therefore, the adaptation of the developed methods to other applications should be convenient.
2

Conversor TrifÃsico com Capacitor Chaveado para LEDs de PotÃncia / Three-Phase Swicthed Capacitor Converter for Power LEDs

Ronaldo Portela Coutinho 08 August 2016 (has links)
CoordenaÃÃo de AperfeÃoamento de Pessoal de NÃvel Superior / Este trabalho apresenta o estudo, o projeto e a implementaÃÃo de um driver trifÃsico para diodos emissores de luz (LEDs) baseado num conversor com capacitor chaveado (SC â Switched Capacitor), tambÃm conhecido como charge-pump. Uma luminÃria LED com a tecnologia Chip-on-Board (COB), que proporciona uma elevada densidade de potÃncia, à utilizada como carga. Assim como os LEDs, os drivers destes dispositivos devem apresentar uma longa vida Ãtil e um elevado rendimento. A vida Ãtil dos drivers para LEDs à geralmente limitada pelo uso de capacitores eletrolÃticos convencionais. Estes dispositivos apresentam uma vida Ãtil incompatÃvel com a dos LEDs e, por isso, nÃo devem ser utilizados nos seus drivers. AlÃm disso, os drivers para LEDs devem proporcionar uma baixa ondulaÃÃo de corrente nos LEDs, garantindo um baixo flicker percentual e evitando danos à saÃde humana. Diante destes problemas, o conversor trifÃsico SC proposto nÃo utiliza capacitores eletrolÃticos, o que eleva a expectativa de vida Ãtil do driver. O conversor emite um baixo flicker percentual e à capaz de estabilizar a corrente de saÃda sem a necessidade de um controle de malha fechada, o que pode reduzir os custos de projeto. A topologia permite a dimerizaÃÃo dos LEDs atravÃs da variaÃÃo da frequÃncia de comutaÃÃo. Resultados experimentais de um protÃtipo de 216 W sÃo analisados e discutidos para validaÃÃo da proposta. Em condiÃÃes nominais, o conversor apresentou um rendimento global de 91,5%, um fator de potÃncia acima de 0,99 e uma distorÃÃo harmÃnica menor que 5% nas trÃs fases, obedecendo as Classes A e C da norma IEC 61000-3-2:2014. AlÃm disso, foi obtida uma ondulaÃÃo de corrente de alta frequÃncia igual a 16,97% e um flicker percentual de 4,97%, estando de acordo com as recomendaÃÃes da IEEE. A dimerizaÃÃo dos LEDs permitiu a reduÃÃo da potÃncia de saÃda em atà 50%, com rendimento prÃximo a 91%, fator de potÃncia acima de 0,97, distorÃÃo harmÃnica total inferior a 6% para as trÃs fases e flicker percentual menor que 7% para toda a faixa de potÃncia. / This paper presents the study, design and implementation of a three-phase light-emitting diode (LED) driver based on a switched capacitor (SC) converter, also known as charge-pump. A LED lamp with Chip-On-Board (COB) technology, which provides a high power density, is used as load. As the LEDs, drivers of these devices must have a high efficiency and a long useful lifetime, which is usually limited by the use of conventional electrolytic capacitors. These devices have an incompatible lifetime with LEDs and, therefore, they should not be used in their drivers. In addition, the LED drivers should provide a low ripple current in LEDs, which can provide the emission of a low percent flicker. Studies demonstrate that excessive percent flicker may cause damage to human health. Given these problems, the proposed switched capacitor LED driver does not use electrolytic capacitors, which increases the expectative of useful lifetime of the driver. It emits a low percent flicker, which reduces the risks to human health. It can stabilize the output current without the need of a closed-loop control, which may reduce design costs. It allows the LEDs dimming by varying the switching frequency. An experimental prototype rated at 216 W has been developed in order to evaluate the performance of the proposed approach, while results are properly presented and discussed. In nominal conditions, the drive presented an overall efficiency of 91.5%, a power factor greater than 0.99 and a current total harmonic distortion lower than 5% in three phases. The harmonic currents are in accordance with the limits imposed by IEC Standard 61000-3-2:2014 to class A and C equipment. Furthermore, a high frequency current ripple equal to 16.97% and a percent flicker of 4.97% was obtained, which is in accordance with IEEE recommendations. The LEDs dimming allowed the reduction of the output power up to 50%, while the efficiency remained close to 91% and the power factor remained above 0.97. In addition, the total harmonic distortion was below 6% and the percent flicker was lower than 7% for the entire dimming range.

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