Traditionally, the design of continuous time active filters usually has a trade offbetween low-voltage and high dynamic range. One way to solve this problem is companding technology. There are two methods for companding filters. The first method utilizes the
exponential I-V characteristics of BJT in the saturation region. In order to reduce the cost andintegrate the analog and digital circuits, the other method was exploited using CMOS process. In this project, a new first-order low pass log-domain filter based on CMOS parasitic vertical BJTwill be proposed. This filter has higher frequency response than previous circuits.
We will first employ Hspice to simulate the log-domain filter to ensure the correctness of the circuit and make it a reliable reference with the circuit layout. After summarizing all the simulations and analyses, the chip will be fabricated with 0.35um CMOS technology.
| Identifer | oai:union.ndltd.org:NSYSU/oai:NSYSU:etd-0725107-172648 |
| Date | 25 July 2007 |
| Creators | Lin, Hsin-hsiu |
| Contributors | Ko-Chi Kuo, Chua-Chin Wang, Chia-Hsiung Kao |
| Publisher | NSYSU |
| Source Sets | NSYSU Electronic Thesis and Dissertation Archive |
| Language | English |
| Detected Language | English |
| Type | text |
| Format | application/pdf |
| Source | http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0725107-172648 |
| Rights | not_available, Copyright information available at source archive |
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