A design and implementation of a multimodule chip-level simulator whose source description language is based on the original GSP2 system is described. To enhance the simulation speed, a special addressing ("sharing single memory location") scheme is used in the implementation of pin connections. The basic data structures and algorithms for the simulator are described. The developed simulator can simulate many digital devices interconnected as a digital network. It also has the capability of modeling external buses and handling the suspension of processes in the environment of multimodule simulation. An example of a multimodule digital system simulation is presented. / M.S.
| Identifer | oai:union.ndltd.org:VTETD/oai:vtechworks.lib.vt.edu:10919/106085 |
| Date | January 1986 |
| Creators | Cho, Chang H. |
| Contributors | Electrical Engineering |
| Publisher | Virginia Polytechnic Institute and State University |
| Source Sets | Virginia Tech Theses and Dissertation |
| Language | English |
| Detected Language | English |
| Type | Thesis, Text |
| Format | viii, 114 leaves, application/pdf, application/pdf |
| Rights | In Copyright, http://rightsstatements.org/vocab/InC/1.0/ |
| Relation | OCLC# 13958044 |
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