This master’s thesis deals with creating a universal module with Ethernet interface and its using for digital values measurement. The main module components are gate array FPGA, microprocessor, PHY chip and RJ45 connector. Printed circuit board is in this thesis designed in Eagle. The chase for board is drawn in SketchUp and printed on a 3D printer. There is a code implemented in created universal module that is performing the function of logic analyzer. Data measured by the analyzer are sent to the Ethernet using UDP/IPv4 protocol. The last part is creating an application in C# to display the measured waveforms on a PC.
| Identifer | oai:union.ndltd.org:nusl.cz/oai:invenio.nusl.cz:221264 |
| Date | January 2015 |
| Creators | Řeháček, Tomáš |
| Contributors | Valach, Soběslav, Burian, František |
| Publisher | Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií |
| Source Sets | Czech ETDs |
| Language | Czech |
| Detected Language | English |
| Type | info:eu-repo/semantics/masterThesis |
| Rights | info:eu-repo/semantics/restrictedAccess |
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