Silver sintering technology has received considerable attention in recent years because it has the potential to be a suitable interconnection material for high-temperature power electronic packaging, such as high melting temperature, high electrical/thermal conductivity, and excellent mechanical reliability. It should be noted, however, that pressure (usually between three to five MPa) was added during the sintering stage for attaching power chips with area larger than 100 mm2. This extra pressure increased the complexity of the sintering process. The maximum chip size processed by pressure-free sintering, in the published resources, was 6 x 6 mm2. One objective of this work was to achieve chip-attachment with area of 13.5 x 13.5 mm2 (a chip size of one kind of commercial IGBT) by pressure-free sintering of nano-silver paste.
Another objective was to fabricate high-power (1200 V and 150 A) multi-chip module by pressure-free sintering. In each module (half-bridge), two IGBT dies (13.5 x 13.5 mm2) and two diode dies (10 x 10 mm2) were attached to a DBC substrate. Modules with solder joints (SN100C) and pressure-sintered silver joints were also fabricated as the control group. The peak temperature in the process of of pressure-free sintering of silver was around 260oC, whereas 270oC for vacuum reflowing of solder, and 280oC under three MPa for pressure-sintering of silver. The process for wire bonding, lead-frame attachment, and thermocouple attachment are also recorded.
Modules with the above three kinds of joints were first characterized by electrical methods. All of them could block 1200 V DC voltage after packaging, which is the voltage rating of bare dies. Modules were also tested up to the rated current (150 A) and half of the rated voltage (600 V), which were the test conditions in the datasheet for commercial modules with the same voltage and current ratings. I-V characteristics of packaged devices were similar (on-resistance less than 0.5 mohm). All switching waveforms at transient stage (both turn-on and turn-off) were clean. Six switching parameters (turn-on delay, rise time, turn-off delay, fall time, turn-on loss, and turn-off loss) were measured, which were also similar (<9%) among different kinds of modules. The results from electrical characterizations showed that both static characterizations and double-pulse test cannot be used for evaluating the differences among chip-attach layers.
All modules were also characterized by their thermal performances. Transient thermal impedances were measured by gate-emitter signals. Two setups for thermal impedance measurement were used. In one setup, the bottoms of modules were left in the air, and in the other setup, bottoms of modules were attached to a chiller (liquid cooling and temperature controlled at 25oC) with thermal grease. Thermal impedances of three kinds of modules still increased after 40 seconds for the testing without chiller, since the thermal resistance of heat convection from bottom copper to the air was included , which was much larger than the sum of the previous layers (from IGBT junction, through the chip-attach layer, to the bottom of DBC substrate). In contrast, thermal impedances became almost stable (less than 3%) after 15 seconds for all modules when the chiller was used. Among these three kinds of modules, the module with pressure sintered joints had the lowest thermal impedance and the thermal resistance (tested with the chiller) around 0.609oK/W, In contrast, the thermal resistance was around 964oK /W for the soldered module, and 2.30oK /W for pressure-free sintered module.
In summary, pressure-free large-area sintered joints were achieved and passed the fabrication process for IGBT half-bridge module with wiring bonding. Packaged devices with these kinds of joints were verified with good electrical performance. However, thermal performances of pressure-free joints were worse than solder joints and pressure-sintered joints. / Master of Science
| Identifer | oai:union.ndltd.org:VTETD/oai:vtechworks.lib.vt.edu:10919/23903 |
| Date | 17 October 2013 |
| Creators | Jiang, Li |
| Contributors | Electrical and Computer Engineering, Ngo, Khai D., Lu, Guo Quan, Guido, Louis J. |
| Publisher | Virginia Tech |
| Source Sets | Virginia Tech Theses and Dissertation |
| Detected Language | English |
| Type | Thesis |
| Format | ETD, application/pdf, application/pdf |
| Rights | In Copyright, http://rightsstatements.org/vocab/InC/1.0/ |
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