Gallium Nitride (GaN) technology is capable of very high power levels but suffers from high non-linearity. With the advent of 5G technologies, high linearity is in greater demand due to complex modulation schemes and crowded RF (Radio Frequency) spectrum. Because of the non-linearity issue, GaN power amplifiers have to be operated at back-off input power levels. Operating at back-off reduces the efficiency of the power amplifier along-with the output power. This research presents a technique to linearize GaN amplifiers. The linearity can be improved by splitting a large device into multiple smaller devices and biasing them individually. This leads to the cancellation of the IMD3 (Third-order Intermodulation Distortion) components at the output of the FETs and hence higher linearity performance.
This technique has been demonstrated in Silicon technology but has not been previously implemented in GaN. This research work presents for the first time the implementation of this technique in GaN Technology.
By the application of this technique, improvement in IMD3 of 4 dBc has been shown for a 0.8-1.0 GHz PA (Power Amplifier), and 9.5 dBm in OIP3 (Third-order Intercept Point) for an S-Band GaN LNA, with linearity FOM (IP3/DC power) reaching up to 20.
Large-signal simulation and analysis have been done to demonstrate linearity improvement for two parallel and four parallel FETs. A simulation methodology has been discussed in detail using commercial CAD software. A power sampler element is used to compute the IMD3 currents coming out of various FETs due to various bias currents. Simulation results show by biasing one device in Class AB and others in deep Class AB, IMD3 components of parallel FETs can be made out of phase of each other, leading to cancellation and improvement in linearity. Improvement up to 20 dBc in IMD3 has been reported through large-signal simulation when four parallel FETs with optimum bias were used.
This technique has also been demonstrated in simulation for an X-Band MMIC PA from 8-10 GHz in GaN technology. Improvements up to 25-30 dBc were shown using the technique of biasing one device with Class AB and other with deep class AB/class B. The proposed amplifier achieves broadband linearization over the entire frequency compared to state-of-the-art PA's. The linearization technique demonstrated is simple, straight forward, and low cost to implement. No additional circuitry is needed. This technique finds its application in high dynamic range RF amplifier circuits for communications and sensing applications. / Doctor of Philosophy / Power amplifiers (PAs) and Low Noise Amplifiers (LNAs) form the front end of the Radio Frequency (RF) transceiver systems. With the advent of complex modulation schemes, it is becoming imperative to improve their linearity. Through this dissertation, we propose a technique for improving the linearity of amplifier circuits used for communication systems. Meanwhile, Gallium Nitride (GaN) is becoming a technology of choice for high-power amplifier circuits due to its higher power handling capability and higher breakdown voltage compared with Gallium Arsenide (GaAs), Silicon Germanium (SiGe) and Complementary Metal-Oxide-Semiconductor (CMOS) technologies.
A circuit design technique of using multiple parallel GaN FETs is presented. In this technique, the multiple parallel FETs have independently controllable gate voltages. Compared to a large single FET, using multiple FETs and biasing them individually helps to improve the linearity through the cancellation of nonlinear distortion components. Experimental results show the highest linearity improvement compared with the other state-of-the-art linearization schemes.
The technique demonstrated is the first time implementation in GaN technology. The technique is a simple and cost-effective solution for improving the linearity of the amplifier circuits. Applications include base station amplifiers, mobile handsets, radars, satellite communication, etc.
| Identifer | oai:union.ndltd.org:VTETD/oai:vtechworks.lib.vt.edu:10919/94361 |
| Date | 04 October 2019 |
| Creators | Saini, Kanika |
| Contributors | Electrical Engineering, Raman, Sanjay, Guido, Louis J., Yi, Yang, Nazhandali, Leyla, Hudait, Mantu K. |
| Publisher | Virginia Tech |
| Source Sets | Virginia Tech Theses and Dissertation |
| Detected Language | English |
| Type | Dissertation |
| Format | ETD, application/pdf |
| Rights | In Copyright, http://rightsstatements.org/vocab/InC/1.0/ |
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