The power consumption of smart camera in car black box varies significantly between light load and heavy load. The high efficiency voltage regulator is necessary in prolong the life of smart camera battery. Since the smart camera only recording the video when car is driving, the most time of the smart camera works in the sleep mode. Hence the light load efficiency is important in this application, however, conventional buck converter usually have high efficiency at heavy load but poor efficiency at light load. To increase the light load efficiency of buck converter, this research continues Yeago's two phase buck converter with optimum phase selection control and Zhao's two mode buck converter to further improve the light load efficiency for the target application.
With 5V input voltage and 1.2V output voltage, the proposed two-mode synchronous buck converter can supply the load power from 12mW to 1.44W. To improve the light load efficiency of conventional buck converter, the proposed design applied Wei's baby buck concept to provide another light load power stage to reduce the switching loss and driving loss at light load. Then, the variable frequency ripple-based constant on-time control with discontinuous conduction mode (DCM) in light load is applied to the baby-buck mode to reduce the switching frequency to further reduce the switching loss. Also, the baby-buck mode uses the synchronous buck topology to remove the diode in asynchronous converter to increase the efficiency at light load. Finally, a sensorless mode selector remove the sensing resistor in power stage to increase the efficiency for entire load range, especially for the heavy load. The mode selector can select the optimum mode for different load condition, and the opposite mode would completely shut down to save the loss.
The proposed design is implement in CMOS 0.25um technology. The proposed monolithic buck converter which include the power stage of heavy buck mode, baby-buck mode and the controller is fabricated. The measurement result shows the close loop efficiency varies from 70%-83% toward the entire load range. / Master of Science
| Identifer | oai:union.ndltd.org:VTETD/oai:vtechworks.lib.vt.edu:10919/72870 |
| Date | 01 September 2016 |
| Creators | Lin, Yu |
| Contributors | Electrical and Computer Engineering, Ha, Dong Sam, Koh, Kwang-Jin, Li, Qiang |
| Publisher | Virginia Tech |
| Source Sets | Virginia Tech Theses and Dissertation |
| Detected Language | English |
| Type | Thesis |
| Format | ETD, application/pdf |
| Rights | In Copyright, http://rightsstatements.org/vocab/InC/1.0/ |
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