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A new methodology of an on chip time measurement circuit for high speed digital testing applications

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1. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.289263

Identifer	oai:union.ndltd.org:bl.uk/oai:ethos.bl.uk:289263
Date	January 2003
Creators	Abas, Mohd Amir
Publisher	University of Newcastle Upon Tyne
Source Sets	Ethos UK
Detected Language	English
Type	Electronic Thesis or Dissertation