A high-performance, hybrid wave-pipelined linear feedback shift register with skew tolerant clocks

Description

Thesis (M.S. in Electrical Engineering)--Washington State University. / Includes bibliographical references.

Links & Downloads

1. http://www.dissertations.wsu.edu/Thesis/Summer2004/j%5Flowe%5F072104.pdf

Tags

Computers, Pipeline. Timing circuits

Additional Fields

Identifer	oai:union.ndltd.org:OCLC/oai:xtcat.oclc.org:OCLCNo/56360353
Date	January 2004
Creators	Lowe, Jeffrey,
Source Sets	OCLC
Language	English
Detected Language	English
Source	Online access for everyone