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Design of an 8-bit Successive Approximation Pipelined Analog to Digital Converter (SAP-ADC) in 90 nm CMOS

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Identiferoai:union.ndltd.org:OhioLink/oai:etd.ohiolink.edu:wright1503596547020087
Date30 August 2017
CreatorsKotti, Vivek
PublisherWright State University / OhioLINK
Source SetsOhiolink ETDs
LanguageEnglish
Detected LanguageEnglish
Typetext
Sourcehttp://rave.ohiolink.edu/etdc/view?acc_num=wright1503596547020087
Rightsunrestricted, This thesis or dissertation is protected by copyright: all rights reserved. It may not be copied or redistributed beyond the terms of applicable copyright laws.

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