<p> In past years, wireless technology has seen an incredible boom. As a result, industry
has gone to great lengths to make wireless devices cheaper, smaller, faster and less power-
hungry. This has prompted a significant interest in the research world to design circuit
components that would facilititate these goals. However, much of the focus has been on
wireless technology for communications applications, such as wireless telephony and wireless
computer networking. More recently, there has been a focus on developing circuits for
other wireless applications, one of which is wireless sensor networks. Such applications
would demand extremely low-power operation, especially from the RF front-end. We have
concentrated on achieving low-power operation for one of the important building blocks of
the RF transceiver, which is the frequency downconversion mixer. </p> <p> In this thesis, we describe the design and results of two mixers, both designed in CMOS O.l8J.Lm technology offered by the Canadian Microelectronics Corporation (CMC). The first design uses the body terminal of the transistor as one of the inputs. This method allows for the radio-frequency (RF) and local oscillator (LO) stages in traditional switching mixers to be collapsed into one stage, thereby allowing for operation at lower supply voltages and lower power comsumption levels. This mixer was designed to downconvert a 1.9GHz RF signal to a 250MHz intermediate-frequency (IF) signal. The measured performance characteristics resulted in a power consumption of 400J.LW from a 0.8V supply, a conversion gain of 1dB, a single sideband (SSB) noise figure of 1ldB, and an input-referred 3rd-order intercept point (IIP3) of -9dBm. </p> <p> The second mixer design used a folding architecture to reduce the supply voltage headroom needed, as well as distribute the current appropriately for high-gain and lowpower operation. This mixer was designed to downconvert a 2.4GHz RF signal to a 100MHz IF signal. The simulated performance characteristics showed a power consumption of 640).1 W from a 1 V supply, a conversion gain of 4dB, a SSB noise figure of 19dB, and an IIP3 of -6.5dBm. </p> / Thesis / Master of Applied Science (MASc)
| Identifer | oai:union.ndltd.org:mcmaster.ca/oai:macsphere.mcmaster.ca:11375/21952 |
| Date | 08 1900 |
| Creators | Jafferali, Nabeel |
| Contributors | Deen, Jamal, Electrical Engineering |
| Source Sets | McMaster University |
| Language | English |
| Detected Language | English |
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