This thesis presents a fully integratable read-out front-end for recording from piezoelectric sensors. It is proposed to periodically reset the input signal to avoid build-up of large voltages across the circuit input terminals. Digitizing the signal after buffering allows removal of the reset steps in the digital domain, thus yielding a faithful representation of the applied input force variation. Different realignment algorithms are presented in this thesis, and the measured results as well as the simulated results from a bench setup are reported which confirm a 52.5 dB dynamic range and recording of frequencies as low as 0.55 Hz. It is also shown the effect of input current leakage is reduced. The proposed system is simulated using the Cadence Spectre simulator, Synopsys HSPICE and National Instruments LabVIEW to confirm its operation. Different realignment algorithms are examined using MATLAB. The read-out circuit is further realized by 0.35 £gm 2-poly 4-metal Taiwan Semiconductor Manufacturing Company (TSMC) process technology. The chip measured results are reported and compared to the simulation. The measured implementation yields a pressure recording range of 0.4 N to 169 N, while consuming 230 £gW from 3 V supplies.
| Identifer | oai:union.ndltd.org:NSYSU/oai:NSYSU:etd-0809110-125517 |
| Date | 09 August 2010 |
| Creators | Huang, Wen-chi |
| Contributors | Robert Rieger, Jih-Ching Chiu, Chua-Chin Wang, Ya-Hsin Hsueh |
| Publisher | NSYSU |
| Source Sets | NSYSU Electronic Thesis and Dissertation Archive |
| Language | English |
| Detected Language | English |
| Type | text |
| Format | application/pdf |
| Source | http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0809110-125517 |
| Rights | off_campus_withheld, Copyright information available at source archive |
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