The basic principles of sequential switching theory were first developed by Huffman and later generalised by Moore and Mealy. These techniques and subsequent ones based on them were mainly concerned with minimizing the amount of logical hardware in the form of discrete gate components. One result of this early work was the development, by Hartmanis, of an algebraic structure theory for sequential systems. In recent years, however, the advent of MSI/LSI has changed the fundamental design requirements, and new design criteria were thus created and many of the conventional minimization methods were rendered obsolete. In particular, no systematic techniques exist for designing systems at the sub-system or system level which ,the MSI and LSI technology requires. In this thesis, using the criterion of minimal total storage requirements of a given sequential switching system, the applicability, of the structure theory due to Hartmanis, in conjunction with MSI/LSI modules is examined, and the different possible resulting structures are also examined for their suitability to LSI/MSI realisations. Also, the interpartition relationships that lead to these structures are studied and best possible component sizes within the different possible structures are determined. In this connection, a procedure has been developed which systematically leads to either least storage or most uniform component machines. However, since a large section of sequential switching systems either do not decompose into convenient sizes and structures or that a large amount of redundancy has to be introduced in order to make them decompose, alternative realisation techniques which can be used to realise such systems have been developed. These are the State and Input techniques, which resemble in some aspects the Ashenhurst-Curtis type of disjunctive decompositions, and are general and result in uniform components. The size and structure of the components can be varied so as to suit available modules. Above all, these systems offer a simple and effective method of realising asynchronous systems requiring no special state assignment. This is done through the use of inertial delays in conjunction with a decoder in the feedback loops of the system.
| Identifer | oai:union.ndltd.org:bl.uk/oai:ethos.bl.uk:460151 |
| Date | January 1976 |
| Creators | Hussain, Ahsan M. A. |
| Publisher | Loughborough University |
| Source Sets | Ethos UK |
| Detected Language | English |
| Type | Electronic Thesis or Dissertation |
| Source | https://dspace.lboro.ac.uk/2134/12170 |
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