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Testing techniques and fault simulation for analogue CMOS integrated circuits

No description available.
Identiferoai:union.ndltd.org:bl.uk/oai:ethos.bl.uk:390727
Date January 2001
CreatorsKilic, Yavuz
PublisherUniversity of Southampton
Source SetsEthos UK
Detected LanguageEnglish
TypeElectronic Thesis or Dissertation

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