This dissertation presents a 2.4 GHz wideband GFSK-modulated frequency synthesizer using two-point delta-sigma modulation (TPDSM). The two bottlenecks in this design have been rigorously investigated. One bottleneck is the nonlinear performance of the phase-locked loop (PLL). The other one is the inherent gain and delay mismatch between the two modulation points. Both nonlinear and mismatch factors dominate the modulation accuracy in the closed PLL. The proposed formulation can successfully predict the dependencies of the modulation accuracy on both factors. The comparison of the averaged frequency deviation and frequency-shift -keying (FSK) error between theory and measurement shows excellent agreement. The modulated frequency synthesizer implemented in this study can achieve a 2.5 Mbps data rate as well as a 15 £gs PLL stable time with only 2.2 % FSK error under good design and operating conditions.
| Identifer | oai:union.ndltd.org:NSYSU/oai:NSYSU:etd-0503105-140434 |
| Date | 03 May 2005 |
| Creators | Peng, Kang-Chun |
| Contributors | Sheng-Fuh Chang, Chih-Wen Kuo, Chin-Chun Meng, Chia-Chan Chang, Ken-Huang Lin, Tzyy-Sheng Horng, Huey-Ru Chuang, Kin-Lu Wong, Shuenn-Yuh Lee |
| Publisher | NSYSU |
| Source Sets | NSYSU Electronic Thesis and Dissertation Archive |
| Language | English |
| Detected Language | English |
| Type | text |
| Format | application/pdf |
| Source | http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0503105-140434 |
| Rights | unrestricted, Copyright information available at source archive |
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