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SW nadstavba analyzátoru sítí pro automatický návrh nn kompenzační jednotky na základě měření / A power network analyzer SW upgrade implementing LV PFC capacitors bank design on the basis of measurement

Thesis is devoted to a problem of Power Factor Correction on the low voltage level. It has still its own difficulties despite the fact that topic moved through long development. The main goal of this work is to offer reader variable procedure considering design process. It is based on use of measured data of network analyzer Meg30. The design algorithm has to share a maximum of eventual influencing factors. Therefore the body of master thesis goes through detailed analysis of Power Factor Correction.

Identiferoai:union.ndltd.org:nusl.cz/oai:invenio.nusl.cz:218704
Date January 2010
CreatorsBernáth, František
ContributorsPospíchal, Ladislav, Drápela, Jiří
PublisherVysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií
Source SetsCzech ETDs
LanguageCzech
Detected LanguageEnglish
Typeinfo:eu-repo/semantics/masterThesis
Rightsinfo:eu-repo/semantics/restrictedAccess

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