This thesis is composed of three independent parts, which are respectively focused on three different applications.
1. A Circuit Design of Fast Bipolar Inner Product Processor for Neural Associative Memory Networks¡G
A novel and high-speed realization of the bipolar-valued inner product processor for associative memory networks is presented. The proposed design is verified to speed up the inner product computation compared with prior works.
2. An Area-Saving 8-bit A/D Converter Using A Binary Search Scheme¡G
A fast and area-saving analog-to-digital converter using DFFs and a digital-to-analog converter is proposed. This design provides a reasonably fast solution for the embedded ADC with the area penalty growing linearly with the data length.
3. A Smart Battery Monitor Emulator System¡G
An efficient smart battery monitor emulator system is designed by using the bq2018 IC of Benchmarq company. This system is aimed to improve the battery monitoring efficiency such that the exact remaining power and time of the battery can be estimated.
| Identifer | oai:union.ndltd.org:NSYSU/oai:NSYSU:etd-0620100-231307 |
| Date | 20 June 2000 |
| Creators | Hsueh, Ya-Hsin |
| Contributors | Chua-Chin Wang, Ing-Jer Huang, Sying-Jyan Wang |
| Publisher | NSYSU |
| Source Sets | NSYSU Electronic Thesis and Dissertation Archive |
| Language | Cholon |
| Detected Language | English |
| Type | text |
| Format | application/pdf |
| Source | http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0620100-231307 |
| Rights | unrestricted, Copyright information available at source archive |
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