The motivation behind this work is to target the demand for high-speed medium-resolution ADCs for satellite communication systems. An 8-bit, 12.5GS/s folding-interpolating ADC was designed in 0.25µm, 190GHz SiGe BiCMOS technology from IHP. The ADC consists of a THA, a reference resistor ladder, folding amplifiers, an interpolating resistor string, a comparator array, a digital encoder, a coarse quantizer and a bit synchronizer.
Post-layout simulation results of the ADC verify that its performance meets all the required specifications. By comparison to other high-speed ADCs, implemented in SiGe technologies, the present design features the highest sampling rate for 8-bit resolution ADCs to date with a good FOM (12.9pJ/conversion).
The THA and the comparator were implemented experimentally and characterized to verify their performance and to ascertain the possibility of implementing the complete ADC. The experimental results meet the expected specifications and indicate that both circuits are suitable for the implementation of the ADC.
| Identifer | oai:union.ndltd.org:TORONTO/oai:tspace.library.utoronto.ca:1807/17508 |
| Date | 10 August 2009 |
| Creators | Ghetmiri, Shohreh |
| Contributors | Salama, C. A. T. |
| Source Sets | University of Toronto |
| Language | en_ca |
| Detected Language | English |
| Type | Thesis |
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