Return to search

A VHDL description of speech recognition front-end

This thesis investigates an implementation of speech recognition front-end.
It is an application specific integrated circuit (ASIC) solution. A Mel Cepstrum
algorithm is implemented for the feature extraction. We present a new mixed split-radix
and radix-2 Fast Fourier Transform (FFT) algorithm, which can effectively
minimize the number of complex multiplications in the speech recognition front-end.
A prime length discrete cosine transform (DCT) is done effectively through
the use of two shorter length correlations. The algorithm results in a circular
correlation structure that is suitable for a constant coefficient multiplication and
shift-register realization. The multiplicative normalization algorithm is used for
square root function. Radix-2 algorithm is used in the first 5 stages and radix-4
algorithm is used in the other stages to speed up the convergence. A similar
normalization algorithm is present for natural logarithm. / Graduation date: 2002

Identiferoai:union.ndltd.org:ORGSU/oai:ir.library.oregonstate.edu:1957/29277
Date17 May 2001
CreatorsXiao, Xin
ContributorsLu, Shih-Lien
Source SetsOregon State University
Languageen_US
Detected LanguageEnglish
TypeThesis/Dissertation

Page generated in 0.0017 seconds