The application of Evolutionary Algorithms in hierarchical model partitioning for parallel system simulation in VLSI design processes has proven to be successful. Thereby, individuals embody partitions
of hardware designs. On the basis of a formal model of parallel cycle simulation a fitness function is chosen combining load balancing and interprocessor communication aspects. As supplement to the concept of superposition we introduce a Local Search Operator to achieve a fast decreasing fitness function during evolution. This operator is based on a modification of a classical iterative partitioning algorithm by Fiduccia-Mattheyses. Results are shown for the partitioning of two real processor models, representing the PowerPC 604 and an IBM S/390 processor.
| Identifer | oai:union.ndltd.org:DRESDEN/oai:qucosa:de:qucosa:32932 |
| Date | 01 February 2019 |
| Creators | Haupt, Reiner, Hering, Klaus, Siedschlag, Thomas |
| Source Sets | Hochschulschriftenserver (HSSS) der SLUB Dresden |
| Language | English |
| Detected Language | English |
| Type | info:eu-repo/semantics/publishedVersion, doc-type:conferenceObject, info:eu-repo/semantics/conferenceObject, doc-type:Text |
| Rights | info:eu-repo/semantics/openAccess |
| Relation | 3-89653-500-5 |
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