Temperature rise due to Joule heating of on-chip interconnects can severely affect performance and reliability of next generation microprocessors. Thermal predictions become difficult due to large number of features, and the impact of electron size effects on electrical and thermal transport. It is thus necessary to develop efficient numerical approaches, and accurate metal and dielectric thermal characterization techniques. In this research, analytical, numerical, and experimental techniques were developed to enable accurate and efficient predictions of interconnect temperature rise.
A finite element based compact thermal model was developed to obtain temperature rise with fewer elements and acceptable accuracy. Temperature drop across the interconnect cross-section was ignored. The compact model performed better than standard finite element model in two and three-dimensional case studies, and the predictions for a real world structure agreed closely with experimentally measured temperature rise.
A numerical solution was developed for electron transport based on the Boltzmann Transport Equation (BTE). This deterministic technique, based on the path integral solution of BTE within the relaxation time approximation, free electron model, and linear response, was applied to a constriction in a finite size thin metallic film. A correlation for effective conductance was obtained for different constriction sizes.
The Atomic Force Microscope (AFM) based Scanning Joule Expansion Microscopy (SJEM) was used to develop a new technique to measure thermal conductivity of thin metallic films in the size effect regime. This technique does not require suspended metal structures, and thus preserves the original electron interface scattering characteristics. The thermal conductivities of 43 nm and 131 nm gold films were extracted to be 82 W/mK and 162 W/mK respectively. These measurements were close to Wiedemann-Franz Law predictions and are significantly smaller than the bulk value of 318 W/mK due to electron size effects. The technique can potentially be applied to interconnects in the sub-100 nm regime.
A semi-analytical solution for the 3-omega method was derived to account for thermal conduction within the metallic heater. It is shown that significant errors can result when the previous solution is applied for anisotropic thermal conductivity measurements.
| Identifer | oai:union.ndltd.org:GATECH/oai:smartech.gatech.edu:1853/10435 |
| Date | 12 January 2006 |
| Creators | Gurrum, Siva P. |
| Publisher | Georgia Institute of Technology |
| Source Sets | Georgia Tech Electronic Thesis and Dissertation Archive |
| Language | en_US |
| Detected Language | English |
| Type | Dissertation |
| Format | 2198151 bytes, application/pdf |
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