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Testování spojů a externích paměťových komponent v FPGA / Testing of Wires and External Memory Components in FPGA

This work deals with COMBO2 card interconnect and memory devices testing. In the beginning of the paper, some existing testing algorithms for interconnect and RAM memories testing are introduced. This work is devoted to proposal of generic architecture for interconnect and memory devices testing. The proposed architecture is optimized for FPGA implementation.

Identiferoai:union.ndltd.org:nusl.cz/oai:invenio.nusl.cz:235966
Date January 2008
CreatorsLouda, Martin
ContributorsKořenek, Jan, Martínek, Tomáš
PublisherVysoké učení technické v Brně. Fakulta informačních technologií
Source SetsCzech ETDs
LanguageCzech
Detected LanguageEnglish
Typeinfo:eu-repo/semantics/masterThesis
Rightsinfo:eu-repo/semantics/restrictedAccess

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