Applying the "split-ADC" architecture to a 16 bit, 1 MS/s differential successive approximation analog-to-digital converter

Description

Thesis (M.S.)--Worcester Polytechnic Institute. / Keywords: error correction, calibration, successive approximation. Includes bibliographical references (leaves 89-91).

Links & Downloads

1. http://www.wpi.edu/Pubs/ETD/Available/etd-043008-164352/

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Additional Fields

Identifer	oai:union.ndltd.org:OCLC/oai:xtcat.oclc.org:OCLCNo/228030083
Date	January 2008
Creators	Chan, Ka Yan.
Publisher	Worcester, Mass. : Worcester Polytechnic Institute,
Source Sets	OCLC
Language	English
Detected Language	English
Source	Link to electronic thesis