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Dynamic modeling of hysteresis-free negative capacitance in ferroelectric/dielectric stacks under fast pulsed voltage operation

To overcome the fundamental limit of the transistor subthreshold swing of 60 mV/dec at room temperature, the use of negative capacitance (NC) in ferroelectric materials was proposed [1]. Due to the recent discovery of ferroelectricity in CMOS compatible HfO₂ and ZrO₂ based thin films [2], [3], the promise of ultra-low power steep-slope devices seems within reach. However, concerns have been raised about switching-speed limitations and unavoidable hysteresis in NC devices [4], [5]. Nevertheless, it was shown that NC effects without hysteresis can be observed in fast pulsed voltage measurements on ferroelectric/dielectric capacitors [6], which was recently confirmed using ferroelectric Hf₀.₅ Zr₀.₅ O₂[7], [8]. While in these works only the integrated charge after each pulse was studied, here we investigate for the first time if the transient voltage and charge characteristics are also hysteresis-free.

Identiferoai:union.ndltd.org:DRESDEN/oai:qucosa:de:qucosa:77575
Date26 January 2022
CreatorsHoffmann, M., Slesazeck, S., Mikolajick, T.
PublisherIEEE
Source SetsHochschulschriftenserver (HSSS) der SLUB Dresden
LanguageEnglish, German
Detected LanguageEnglish
Typeinfo:eu-repo/semantics/acceptedVersion, doc-type:conferenceObject, info:eu-repo/semantics/conferenceObject, doc-type:Text
Rightsinfo:eu-repo/semantics/openAccess
Relation978-1-72812-112-3, 10.1109/DRC46940.2019.9046415

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