This thesis describes the theoretical development, design, and implementation of a novel measurement system, called a Sampling Swept Time Delay Short Pulse (SSTDSP) wireless channel sounder, capable of real time in field performance characterization of high speed fixed wireless links. The SSTDSP sounder has been designed to provide vital performance metrics for fixed point high data rate applications in the 28 GHz LMDS band at a fraction of the cost and complexity of existing wideband channel sounders.
The SSTDSP sounder monitors the behavior of the LMDS channel by sampling the impulse response of the channel in real time. This digitized impulse response is used to assemble a power delay profile and render real-time channel performance metrics such as the mean excess delay, RMS delay spread, maximum excess delay for a given multipath threshold, and coherence bandwidth. The SSTDSP sounder is capable of recording these metrics through three modes of operation - continuous channel monitoring, single instant channel snapshot, or data logging. Swept time delay time dilation processing is combined with precise sample and hold gating to reduce the analog to digital converter sampling rate required to digitize the nanosecond short pulses from 2 Gsps to 1 Msps, while retaining the required effective Nyquist sampling rate of 2 Gsps. This dramatically reduces the memory, digital signal processing, and data logging storage requirements as well as the overall cost of the sounder system.
The thesis presents the theory behind channel sounding and discusses whether there is a "bounce path" available to LMDS. Several existing channel sounding methods are compared for this application. A number of specific design and performance criteria from each of these methods are synthesized to produce the Sampling Swept Time Delay Short Pulse Sounder architecture. The design and implementation process used to realize the SSTDSP sounder is presented, including a system overview, module details, and algorithm development details. A calibration and measurement test procedure is outlined and system verification results are presented.
Current work in progress on the test platform and future improvements to the modular system are outlined, as well as conclusions and future implications of the system. / Master of Science
| Identifer | oai:union.ndltd.org:VTETD/oai:vtechworks.lib.vt.edu:10919/35113 |
| Date | 23 September 2001 |
| Creators | Rieser, Christian James |
| Contributors | Electrical and Computer Engineering, Bostian, Charles W., Pratt, Timothy J., Reed, Jeffrey H., Sweeney, Dennis G. |
| Publisher | Virginia Tech |
| Source Sets | Virginia Tech Theses and Dissertation |
| Detected Language | English |
| Type | Thesis |
| Format | application/pdf |
| Rights | In Copyright, http://rightsstatements.org/vocab/InC/1.0/ |
| Relation | CJRieserVTMSEEThesis092201.pdf |
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