The ability to distribute signals everywhere in a circuit with controlled and known delays is essential in large, high-speed digital systems. We present a technique by which a signal driver can adjust the arrival time of the signal at the end of the wire using a pair of matched variable delay lines. We show an implemention of this idea requiring no extra wiring, and how it can be extended to distribute signals skew-free to receivers along the signal run. We demonstrate how this scheme fits into the boundary scan logic of a VLSI chip.
Identifer | oai:union.ndltd.org:MIT/oai:dspace.mit.edu:1721.1/5986 |
Date | 01 March 1992 |
Creators | Knight, Thomas, Wu, Henry M. |
Source Sets | M.I.T. Theses and Dissertation |
Language | en_US |
Detected Language | English |
Format | 13 p., 36138 bytes, 144481 bytes, application/octet-stream, application/pdf |
Relation | AIM-1282 |
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